74AUP1G240GM-H NXP Semiconductors, 74AUP1G240GM-H Datasheet - Page 18

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74AUP1G240GM-H

Manufacturer Part Number
74AUP1G240GM-H
Description
Buffers & Line Drivers 3V SINGLE BUF/LD INV 3S
Manufacturer
NXP Semiconductors
Datasheet

Specifications of 74AUP1G240GM-H

Product Category
Buffers & Line Drivers
Rohs
yes
Number Of Input Lines
1
Number Of Output Lines
1
Polarity
Inverting
Supply Voltage - Max
3.6 V
Supply Voltage - Min
0.8 V
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
Package / Case
XSON-6
High Level Output Current
- 4 mA
Logic Family
AUP
Logic Type
CMOS
Low Level Output Current
4 mA
Minimum Operating Temperature
- 40 C
Number Of Channels Per Chip
1
Output Type
3-State
Propagation Delay Time
21.6 ns at 1.1 V to 1.3 V, 12.3 ns at 1.4 V to 1.6 V, 9.5 ns at 1.65 V to 1.95 V, 7.1 ns at 2.3 V to 2.7 V, 6.4 ns at 3 V to 3.6 V
Factory Pack Quantity
5000
Part # Aliases
74AUP1G240GM,132
NXP Semiconductors
Fig 15. Package outline SOT1202 (XSON6)
74AUP1G240
Product data sheet
XSON6: extremely thin small outline package; no leads;
6 terminals; body 1.0 x 1.0 x 0.35 mm
Dimensions
Note
1. Including plating thickness.
2. Visible depending upon used manufacturing technology.
mm
SOT1202
Unit
Outline
version
max
nom
min
0.35 0.04
A
(1)
A
1
0.20
0.15
0.12
b
IEC
terminal 1
index area
1.05
1.00
0.95
e
D
(6×)
L
(2)
1.05
1.00
0.95
1
E
0.55 0.35
JEDEC
e
1
6
All information provided in this document is subject to legal disclaimers.
e
e
1
1
References
D
2
5
0.35
0.30
0.27
0
Rev. 4 — 29 June 2012
L
e
1
0.40
0.35
0.32
L
1
b
3
4
JEITA
scale
0.5
A
E
L
1
A
Low-power inverting buffer/line driver; 3-state
1 mm
(4×)
(2)
European
projection
74AUP1G240
© NXP B.V. 2012. All rights reserved.
Issue date
10-04-02
10-04-06
sot1202_po
SOT1202
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