C8051T323-GMR Silicon Labs, C8051T323-GMR Datasheet - Page 219
C8051T323-GMR
Manufacturer Part Number
C8051T323-GMR
Description
8-bit Microcontrollers - MCU USB-OTP-16K-QFN28
Manufacturer
Silicon Labs
Datasheet
1.C8051T322-GQR.pdf
(292 pages)
Specifications of C8051T323-GMR
Rohs
yes
Core
8051
Data Bus Width
8 bit
Processor Series
C8051
- Current page: 219 of 292
- Download datasheet (2Mb)
26.3. Configuration and Operation
UART1 provides standard asynchronous, full duplex communication. It can operate in a point-to-point
serial communications application, or as a node on a multi-processor serial interface. To operate in a point-
to-point application, where there are only two devices on the serial bus, the MCE1 bit in SMOD1 should be
cleared to 0. For operation as part of a multi-processor communications bus, the MCE1 and XBE1 bits
should both be set to 1. In both types of applications, data is transmitted from the microcontroller on the
TX1 pin, and received on the RX1 pin. The TX1 and RX1 pins are configured using the crossbar and the
Port I/O registers, as detailed in Section “22. Port Input/Output” on page 133.
In typical UART communications, The transmit (TX) output of one device is connected to the receive (RX)
input of the other device, either directly or through a bus transceiver, as shown in Figure 26.5.
SPACE
SPACE
MARK
MARK
BIT TIMES
BIT TIMES
SPACE
MARK
BIT TIMES
START
START
BIT
BIT
START
Figure 26.2. UART1 Timing Without Parity or Extra Bit
BIT
D
D
0
0
Figure 26.4. UART1 Timing With Extra Bit
Figure 26.3. UART1 Timing With Parity
D
0
D
D
1
1
N bits; N = 5, 6, 7, or 8
N bits; N = 5, 6, 7, or 8
C8051T620/621/320/321/322/323
D
1
N bits; N = 5, 6, 7, or 8
Rev. 1.1
D
D
N-2
N-2
D
N-2
D
D
N-1
N-1
D
N-1
PARITY
EXTRA
STOP
BIT 1
STOP
STOP
BIT 1
BIT 1
Optional
STOP
BIT 2
Optional
Optional
STOP
STOP
BIT 2
BIT 2
219
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