C8051T323-GMR Silicon Labs, C8051T323-GMR Datasheet - Page 52
C8051T323-GMR
Manufacturer Part Number
C8051T323-GMR
Description
8-bit Microcontrollers - MCU USB-OTP-16K-QFN28
Manufacturer
Silicon Labs
Datasheet
1.C8051T322-GQR.pdf
(292 pages)
Specifications of C8051T323-GMR
Rohs
yes
Core
8051
Data Bus Width
8 bit
Processor Series
C8051
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C8051T620/621/320/321/322/323
8.4.1. Window Detector Example
Figure 8.4
ADC0LTH:ADC0LTL = 0x0080 (128d) and ADC0GTH:ADC0GTL = 0x0040 (64d). The input voltage can
range from 0 to VREF x (1023/1024) with respect to GND, and is represented by a 10-bit unsigned integer
value. In the left example, an AD0WINT interrupt will be generated if the ADC0 conversion word
(ADC0H:ADC0L) is within the range defined by ADC0GTH:ADC0GTL and ADC0LTH:ADC0LTL
(if 0x0040 < ADC0H:ADC0L < 0x0080). In the right example, and AD0WINT interrupt will be generated if
the ADC0 conversion word is outside of the range defined by the ADC0GT and ADC0LT registers
(if ADC0H:ADC0L < 0x0040 or ADC0H:ADC0L > 0x0080). Figure 8.5 shows an example using left-justi-
fied data with the same comparison values.
52
VREF x (128/1024)
VREF x (128/1024)
VREF x (64/1024)
VREF x (64/1024)
VREF x (1023/
VREF x (1023/
Input Voltage
(AIN - GND)
Input Voltage
(AIN - GND)
1024)
1024)
0
0
shows
Figure 8.4. ADC Window Compare Example: Right-Justified Data
ADC0H:ADC0L
ADC0H:ADC0L
Figure 8.5. ADC Window Compare Example: Left-Justified Data
0xFFC0
0x1FC0
0x0FC0
0x2040
0x2000
0x1040
0x1000
0x0000
0x03FF
0x007F
0x003F
0x0081
0x0080
0x0041
0x0040
0x0000
two
example
ADC0GTH:ADC0GTL
ADC0GTH:ADC0GTL
ADC0LTH:ADC0LTL
ADC0LTH:ADC0LTL
not affected
not affected
not affected
not affected
AD0WINT
AD0WINT
AD0WINT
AD0WINT
window
AD0WINT=1
AD0WINT=1
Rev. 1.1
comparisons
VREF x (128/1024)
VREF x (128/1024)
VREF x (64/1024)
VREF x (64/1024)
VREF x (1023/
VREF x (1023/
Input Voltage
Input Voltage
(AIN - GND)
(AIN - GND)
1024)
1024)
0
0
ADC0H:ADC0L
ADC0H:ADC0L
for
0xFFC0
0x1FC0
0x0FC0
0x03FF
0x007F
0x003F
0x2040
0x2000
0x1040
0x1000
0x0000
0x0081
0x0080
0x0041
0x0040
0x0000
right-justified
ADC0GTH:ADC0GTL
ADC0GTH:ADC0GTL
ADC0LTH:ADC0LTL
ADC0LTH:ADC0LTL
not affected
not affected
AD0WINT
AD0WINT
data,
AD0WINT=1
AD0WINT=1
AD0WINT=1
AD0WINT=1
with
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