M95256-WMN6P STMicroelectronics, M95256-WMN6P Datasheet - Page 23

• Manufacturer Part Number: M95256-WMN6P
• Description: IC EEPROM 256KBIT 5MHZ 8SOIC
• Manufacturer: STMicroelectronics

Specifications of M95256-WMN6P

• Format - Memory: EEPROMs - Serial
• Memory Type: EEPROM
• Memory Size: 256K (32K x 8)
• Speed: 5MHz
• Interface: SPI, 3-Wire Serial
• Voltage - Supply: 2.5 V ~ 5.5 V
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 8-SOIC (3.9mm Width)
• Organization: 32 K x 8
• Interface Type: SPI
• Maximum Clock Frequency: 5 MHz
• Access Time: 60 ns
• Supply Voltage (max): 6.5 V
• Supply Voltage (min): 2.5 V
• Maximum Operating Current: 5 mA
• Maximum Operating Temperature: + 130 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• Operating Supply Voltage: 2.5 V, 5.5 V
• Memory Configuration: 32K X 8
• Ic Interface Type: Serial, SPI
• Clock Frequency: 20MHz
• Supply Voltage Range: 2.5V To 5.5V
• Memory Case Style: SOIC
• No. Of Pins: 8
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 497-6357-5; M95256-WMN6P

M95256-DR, M95256, M95256-W, M95256-R
5.7
Figure 13. Read Identification Page sequence
Read Identification Page (available only in M95256-DR
devices)
The Identification Page (64 bytes) is an additional page which can be written and (later)
permanently locked in Read-only mode.
Reading this page is achieved with the Read Identification Page instruction (see
The Chip Select signal (S) is first driven low, the bits of the instruction byte and address
bytes are then shifted in, on Serial Data input (D). Address bit A10 must be 0, address bits
[A17:A11] and [A9:A8] are Don't Care, and the data byte pointed to by [A7:A0] is shifted out
on Serial Data output (Q). If Chip Select (S) continues to be driven low, the internal address
register is automatically incremented, and the byte of data at the new address is shifted out.
The number of bytes to read in the ID page must not exceed the page boundary (e.g.: when
reading the ID page from location 24d, the number of bytes should be less than or equal to
40d, as the ID page boundary is 64 bytes).
The read cycle is terminated by driving Chip Select (S) high. The rising edge of the Chip
Select (S) signal can occur at any time during the cycle. The first byte addressed can be any
byte within any page.
The instruction is not accepted, and is not executed, if a write cycle is currently in progress.
Doc ID 12276 Rev 11
Instructions
Table
4).
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