P83C654X2FBD/CV710 NXP Semiconductors, P83C654X2FBD/CV710 Datasheet - Page 6
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P83C654X2FBD/CV710
Manufacturer Part Number
P83C654X2FBD/CV710
Description
8-bit Microcontrollers - MCU P83C654X2FBD/LQFP44/TRAYBM//CV
Manufacturer
NXP Semiconductors
Datasheet
1.P83C654X2FBDCV710.pdf
(88 pages)
Specifications of P83C654X2FBD/CV710
Core
80C51
Data Bus Width
8 bit
Maximum Clock Frequency
16 MHz
Program Memory Size
16 KB
Data Ram Size
256 B
Operating Supply Voltage
5 V
Package / Case
SOT-187-2
Mounting Style
SMD/SMT
Interface Type
I2C, Serial
Number Of Programmable I/os
4
Number Of Timers
3
Processor Series
80C51
Program Memory Type
OTP EPROM
Philips Semiconductors
PIN DESCRIPTIONS
2004 Apr 20
V
V
P0.0–0.7
P1.0–P1.7
P2.0–P2.7
P3.0–P3.7
RST
ALE
PSEN
MNEMONIC
MNEMONIC
SS
CC
80C51 8-bit microcontroller family
256B RAM, low voltage (2.7 to 5.5 V), low power, high speed
(30/33 MHz)
2
2
2
2
2
2
2
PLCC
43–36
24–31
13–19
2–9
PIN NUMBER
11,
22
44
11
13
14
15
16
17
18
19
10
33
32
2
3
3
4
5
6
7
8
9
5, 7–13
40–44,
37–30
18–25
LQFP
1–3
16
38
40
41
41
42
43
44
10
11
12
13
27
26
1
2
3
5
7
8
9
4
TYPE
TYPE
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
O
O
O
O
O
I
I
I
I
I
I
I
I
I
I
I
16 kB OTP/ROM,
Ground: 0 V reference.
Power Supply: This is the power supply voltage for normal, idle, and power-down operation.
Port 0: Port 0 is an open-drain, bidirectional I/O port. Port 0 pins that have 1s written to them
float and can be used as high-impedance inputs. Port 0 is also the multiplexed low-order
address and data bus during accesses to external program and data memory. In this
application, it uses strong internal pull-ups when emitting 1s.
Port 1: Port 1 is an 8-bit bidirectional I/O port with internal pull-ups on all pins. Port 1 pins that
have 1s written to them are pulled HIGH by the internal pull-ups and can be used as inputs. As
inputs, port 1 pins that are externally pulled LOW will source current because of the internal
pull-ups. (See DC Electrical Characteristics: I
Alternate functions for P8xC654X2 Port 1 include:
Port 2: Port 2 is an 8-bit bidirectional I/O port with internal pull-ups. Port 2 pins that have 1s
written to them are pulled HIGH by the internal pull-ups and can be used as inputs. As inputs,
port 2 pins that are externally being pulled LOW will source current because of the internal
pull-ups. (See DC Electrical Characteristics: I
during fetches from external program memory and during accesses to external data memory
that use 16-bit addresses (MOVX @DPTR). In this application, it uses strong internal pull-ups
when emitting 1s. During accesses to external data memory that use 8-bit addresses (MOV
@Ri), port 2 emits the contents of the P2 special function register.
Port 3: Port 3 is an 8-bit bidirectional I/O port with internal pull-ups. Port 3 pins that have 1s
written to them are pulled HIGH by the internal pull-ups and can be used as inputs. As inputs,
port 3 pins that are externally being pulled LOW will source current because of the pull-ups.
(See DC Electrical Characteristics: I
P8xC654X2, as listed below:
Reset: A HIGH on this pin for two machine cycles while the oscillator is running, resets the
device. An internal diffused resistor to V
capacitor to V
Address Latch Enable: Output pulse for latching the LOW byte of the address during an
access to external memory. In normal operation, ALE is emitted at constant rate of 1/6 the
oscillator frequency in 12x clock mode, 1/3 the oscillator frequency in 6x clock mode, and can
be used for external timing or clocking. Note that one ALE pulse is skipped during each access
to external data memory. ALE can be disabled by setting SFR auxiliary.0. With this bit set, ALE
will be active only during a MOVX instruction.
Program Store Enable: The read strobe to external program memory. When executing code
from the external program memory, PSEN is activated twice each machine cycle, except that
two PSEN activations are skipped during each access to external data memory. PSEN is not
activated during fetches from internal program memory.
T2 (P1.0): Timer/Counter 2 external count input/Clockout (see Programmable Clock-Out)
T2EX (P1.1): Timer/Counter 2 Reload/Capture/Direction Control
SCL (P1.6): I
SDA (P1.7): I
RxD (P3.0): Serial input port
TxD (P3.1): Serial output port
INT0 (P3.2): External interrupt 0
INT1 (P3.3): External interrupt 1
T0 (P3.4): Timer 0 external input
T1 (P3.5): Timer 1 external input
WR (P3.6): External data memory write strobe
RD (P3.7): External data memory read strobe
CC
.
2
2
C-bus clock line (open drain)
C-bus data line (open drain)
6
NAME AND FUNCTION
NAME AND FUNCTION
IL
). Port 3 also serves the special features of the
SS
permits a power-on reset using only an external
IL
IL
).
). Port 2 emits the high-order address byte
P83C654X2/P87C654X2
Product data