P83C654X2FBD/CV710 NXP Semiconductors, P83C654X2FBD/CV710 Datasheet - Page 80

• Manufacturer Part Number: P83C654X2FBD/CV710
• Description: 8-bit Microcontrollers - MCU P83C654X2FBD/LQFP44/TRAYBM//CV
• Manufacturer: NXP Semiconductors

Specifications of P83C654X2FBD/CV710

• Core: 80C51
• Data Bus Width: 8 bit
• Maximum Clock Frequency: 16 MHz
• Program Memory Size: 16 KB
• Data Ram Size: 256 B
• Operating Supply Voltage: 5 V
• Package / Case: SOT-187-2
• Mounting Style: SMD/SMT
• Interface Type: I2C, Serial
• Number Of Programmable I/os: 4
• Number Of Timers: 3
• Processor Series: 80C51
• Program Memory Type: OTP EPROM

1. ‘0’ = Valid LOW for that pin, ‘1’ = valid HIGH for that pin.
2. V
3. V
4. Bit is output on P0.4 (1 = 12x, 0 = 6x).
5. Security bit one is output on P0.7.
*
1. P – programmed. U – unprogrammed.
2. Any other combination of the security bits is not defined.
Philips Semiconductors
Table 15. EPROM Programming Modes
NOTES:
Table 16. Program Security Bits for EPROM Devices
NOTES:
2004 Apr 20
Read signature
Program code data
Verify code data
Pgm encryption table
Pgm security bit 1
Pgm security bit 2
Pgm security bit 3
Program to 6-clock mode
Verify 6-clock
Verify security bits
80C51 8-bit microcontroller family
256B RAM, low voltage (2.7 to 5.5 V), low power, high speed
(30/33 MHz)
Security bit two is output on P0.6.
Security bit three is output on P0.3.
ALE/PROG receives 5 programming pulses for code data (also for user array; 5 pulses for encryption or security bits) while V
12.75 V. Each programming pulse is LOW for 100 s ( 10 s) and HIGH for a minimum of 10 s.
1
2
3
4
PP
CC
PROGRAM LOCK BITS
= 12.75 V 0.25 V.
= 5 V 10 % during programming and verification.
SB1
MODE
U
P
P
P
4
5
SB2
U
U
P
P
1, 2
SB3
U
U
U
P
RST
1
1
1
1
1
1
1
1
1
1
PROTECTION DESCRIPTION
No Program Security features enabled. (Code verify will still be encrypted by the Encryption Array if
programmed.)
MOVC instructions executed from external program memory are disabled from fetching code bytes
from internal memory, EA is sampled and latched on Reset, and further programming of the EPROM
is disabled.
Same as 2, also verify is disabled.
Same as 3, external execution is disabled. Internal data RAM is not accessible.
16 kB OTP/ROM,
PSEN
0
0
0
0
0
0
0
0
0
0
ALE/PROG
0*
0*
0*
0*
0*
0*
1
1
1
1
80
EA/V
V
V
V
V
V
V
1
1
1
1
PP
PP
PP
PP
PP
PP
PP
P2.7
0
1
0
1
1
1
0
0
e
e
P83C654X2/P87C654X2
P2.6
0
0
0
0
1
1
1
0
0
0
P3.7
0
1
1
1
1
0
0
1
0
1
P3.6
0
1
1
0
1
0
1
0
1
0
PP
Product data
is held at
P3.3
X
X
X
X
X
X
X
X
0
1