AT25DF641-S3H-T Atmel, AT25DF641-S3H-T Datasheet - Page 17

• Manufacturer Part Number: AT25DF641-S3H-T
• Description: IC FLASH 64MBIT 100MHZ 16SOIC
• Manufacturer: Atmel

Specifications of AT25DF641-S3H-T

• Format - Memory: FLASH
• Memory Type: DataFLASH
• Memory Size: 64M (32K pages x 256 bytes)
• Speed: 100MHz
• Interface: SPI, 3-Wire Serial
• Voltage - Supply: 2.7 V ~ 3.6 V
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 16-SOIC (0.300", 7.5mm Width)
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

7.5.
3680F–DFLASH–4/10
Figure 7-6.
Program/Erase Suspend
In some code plus data storage applications, it is often necessary to process certain high-level system interrupts
that require relatively immediate reading of code or data from the Flash memory. In such an instance, it may not
be possible for the system to wait the microseconds or milliseconds required for the Flash memory to complete a
program or erase cycle. The Program/Erase Suspend command allows a program or erase operation in progress
to a particular 64-Kbyte sector of the Flash memory array to be suspended so that other device operations can be
performed. For example, by suspending an erase operation to a particular sector, the system can perform
functions such as a program or read operation within another 64-Kbyte sector in the device. Other device
operations, such as a Read Status Register, can also be performed while a program or erase operation is
suspended. Table 7-1 outlines the operations that are allowed and not allowed during a program or erase
suspend.
Since the need to suspend a program or erase operation is immediate, the Write Enable command does not need
to be issued prior to the Program/Erase Suspend command being issued. Therefore, the Program/Erase Suspend
command operates independently of the state of the WEL bit in the Status Register.
To perform a Program/Erase Suspend, the
into the device. No address bytes need to be clocked into the device, and any data clocked in after the opcode
will be ignored. When the
suspended within a time of t
Register will then be set to the logical “1” state to indicate that the program or erase operation has been
suspended. In addition, the RDY/BSY bit in the Status Register will indicate that the device is ready for another
operation. The complete opcode must be clocked into the device before the
must be deasserted on an even byte boundary (multiples of eight bits); otherwise, no suspend operation will be
performed.
Read operations are not allowed to a 64-Kbyte sector that has had its program or erase operation suspended. If a
read is attempted to a suspended sector, then the device will output undefined data. Therefore, when performing
a Read Array operation to an unsuspended sector and the device’s internal address counter increments and
crosses the sector boundary to a suspended sector, the device will then start outputting undefined data
continuously until the address counter increments and crosses a sector boundary to an unsuspended sector.
SCK
SO
CS
SI
Chip Erase
MS B
HIG H-IMP E DANC E
C
0
C
1
C
CS
2
OP C ODE
SUSP
C
3
pin is deasserted, the program or erase operation currently in progress will be
C
. The Program Suspend (PS) bit or the Erase Suspend (ES) bit in the Status
4
C
5
C
6
C
7
CS
pin must first be asserted and the opcode of B0h must be clocked
CS
Atmel AT25DF641
pin is deasserted, and the
CS
pin
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