AT25DF641-S3H-T Atmel, AT25DF641-S3H-T Datasheet - Page 41

IC FLASH 64MBIT 100MHZ 16SOIC

AT25DF641-S3H-T

Manufacturer Part Number
AT25DF641-S3H-T
Description
IC FLASH 64MBIT 100MHZ 16SOIC
Manufacturer
Atmel
Datasheet

Specifications of AT25DF641-S3H-T

Format - Memory
FLASH
Memory Type
DataFLASH
Memory Size
64M (32K pages x 256 bytes)
Speed
100MHz
Interface
SPI, 3-Wire Serial
Voltage - Supply
2.7 V ~ 3.6 V
Operating Temperature
-40°C ~ 85°C
Package / Case
16-SOIC (0.300", 7.5mm Width)
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
AT25DF641-S3H-T
Manufacturer:
ATMEL/爱特梅尔
Quantity:
20 000
Company:
Part Number:
AT25DF641-S3H-T
Quantity:
730
11.2.
3680F–DFLASH–4/10
Read Manufacturer and Device ID
Identification information can be read from the device to enable systems to electronically query and identify the
device while it is in system. The identification method and the command opcode comply with the JEDEC standard
for “Manufacturer and Device ID Read Methodology for SPI Compatible Serial Interface Memory Devices”. The
type of information that can be read from the device includes the JEDEC defined Manufacturer ID, the vendor
specific Device ID, and the vendor specific Extended Device Information.
The Read Manufacturer and Device ID command is limited to a maximum clock frequency of f
Flash devices are capable of operating at very high clock frequencies, applications should be designed to read
the identification information from the devices at a reasonably low clock frequency to ensure that all devices to be
used in the application can be identified properly. Once the identification process is complete, the application can
then increase the clock frequency to accommodate specific Flash devices that are capable of operating at the
higher clock frequencies.
To read the identification information, the
into the device. After the opcode has been clocked in, the device will begin outputting the identification data on
the SO pin during the subsequent clock cycles. The first byte that will be output will be the Manufacturer ID
followed by two bytes of Device ID information. The fourth byte output will be the Extended Device Information
String Length, which will be 00h indicating that no Extended Device Information follows. After the Extended
Device Information String Length byte is output, the SO pin will go into a high-impedance state; therefore,
additional clock cycles will have no affect on the SO pin and no data will be output. As indicated in the JEDEC
standard, reading the Extended Device Information String Length and any subsequent data is optional.
Deasserting the
high-impedance state. The
read.
Table 11-1.
Table 11-2.
Data Type
Manufacturer ID
Device ID (Part 1)
Device ID (Part 2)
Byte No.
1
2
3
4
Data Type
Manufacturer ID
Device ID (Part 1)
Device ID (Part 2)
Extended Device Information String Length
Manufacturer and Device ID Information
Manufacturer and Device ID Details
CS
Bit 7
0
0
0
pin will terminate the Manufacturer and Device ID read operation and put the SO pin into a
Family Code
Sub Code
Bit 6
0
1
0
CS
Bit 5
pin can be deasserted at any time and does not require that a full byte of data be
0
0
0
JEDEC Assigned Code
Bit 4
1
0
0
CS
Product Version Code
Bit 3
1
1
0
pin must first be asserted and the opcode of 9Fh must be clocked
Density Code
Bit 2
1
0
0
Bit 1
1
0
0
Bit 0
1
0
0
Value Details
Hex
1Fh JEDEC Code:
48h
00h
Family Code:
Density Code:
Sub Code:
Product Version: 00000 (Initial version)
Atmel AT25DF641
0001 1111 (1Fh for Atmel)
010 (AT25DF/26DFxxx series)
01000 (64-Mbit)
000 (Standard series)
CLK
. Since not all
Value
1Fh
48h
00h
00h
41

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