MA240026 Microchip Technology, MA240026 Datasheet - Page 154
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MA240026
Manufacturer Part Number
MA240026
Description
Daughter Cards & OEM Boards PIC24FJ16MC102 Plug-In Module
Manufacturer
Microchip Technology
Datasheet
1.MA240026.pdf
(304 pages)
Specifications of MA240026
Rohs
yes
Data Bus Width
16 bit
Description/function
PIC24F 28 Pin QFN to 100 Pin Plug-in-Module
Interface Type
I2C, SPI, UART
Maximum Operating Temperature
+ 125 C
Minimum Operating Temperature
- 40 C
Operating Supply Voltage
3 V to 3.6 V
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
MA240026
Manufacturer:
MICROCHIP
Quantity:
12 000
- Current page: 154 of 304
- Download datasheet (3Mb)
PIC24FJ16MC101/102
REGISTER 16-1:
DS39997B-page 154
bit 15
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 15
bit 14
bit 13
bit 12-7
bit 6
bit 5-2
bit 1
bit 0
SPIEN
R/W-0
U-0
—
SPIEN: SPIx Enable bit
1 = Enables module and configures SCKx, SDOx, SDIx and SSx as serial port pins
0 = Disables module
Unimplemented: Read as ‘0’
SPISIDL: Stop in Idle Mode bit
1 = Discontinue module operation when device enters Idle mode
0 = Continue module operation in Idle mode
Unimplemented: Read as ‘0’
SPIROV: Receive Overflow Flag bit
1 = A new byte/word is completely received and discarded. The user software has not read the
0 = No overflow has occurred.
Unimplemented: Read as ‘0’
SPITBF: SPIx Transmit Buffer Full Status bit
1 = Transmit not yet started, SPIxTXB is full
0 = Transmit started, SPIxTXB is empty
Automatically set in hardware when CPU writes SPIxBUF location, loading SPIxTXB.
Automatically cleared in hardware when SPIx module transfers data from SPIxTXB to SPIxSR.
SPIRBF: SPIx Receive Buffer Full Status bit
1 = Receive complete, SPIxRXB is full
0 = Receive is not complete, SPIxRXB is empty
Automatically set in hardware when SPIx transfers data from SPIxSR to SPIxRXB.
Automatically cleared in hardware when core reads SPIxBUF location, reading SPIxRXB.
SPIROV
R/C-0
previous data in the SPIxBUF register.
U-0
—
SPIxSTAT: SPIx STATUS AND CONTROL REGISTER
C = Clearable bit
W = Writable bit
‘1’ = Bit is set
SPISIDL
R/W-0
U-0
—
U-0
U-0
Preliminary
—
—
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
U-0
U-0
—
—
U-0
U-0
—
—
© 2011 Microchip Technology Inc.
x = Bit is unknown
SPITBF
R-0
U-0
—
SPIRBF
U-0
R-0
—
bit 8
bit 0
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