MA240026 Microchip Technology, MA240026 Datasheet - Page 20

• Manufacturer Part Number: MA240026
• Description: Daughter Cards & OEM Boards PIC24FJ16MC102 Plug-In Module
• Manufacturer: Microchip Technology

Specifications of MA240026

• Rohs: yes
• Data Bus Width: 16 bit
• Description/function: PIC24F 28 Pin QFN to 100 Pin Plug-in-Module
• Interface Type: I2C, SPI, UART
• Maximum Operating Temperature: + 125 C
• Minimum Operating Temperature: - 40 C
• Operating Supply Voltage: 3 V to 3.6 V

PIC24FJ16MC101/102
2.7
If the PLL of the target device is enabled and
configured for the device start-up oscillator, the
maximum oscillator source frequency must be limited
to 4 MHz < F
F
PLL start-up conditions. HSPLL mode is not supported.
This means that if the external oscillator frequency is
outside this range, the application must start-up in the
FRC mode first. The fixed PLL settings of 4x after a
POR with an oscillator frequency outside this range will
violate the device operating speed.
Once the device powers up, the application firmware
can enable the PLL, and then perform a clock switch to
the Oscillator + PLL clock source. Note that clock
switching must be enabled in the device Configuration
word.
2.8
If MPLAB ICD 2, MPLAB ICD 3, or MPLAB REAL ICE
in-circuit emulator is selected as a debugger, it
automatically initializes all of the analog-to-digital input
pins (ANx) as “digital” pins, by setting all bits in the
AD1PCFGL register.
The bits in the register that correspond to the
analog-to-digital pins that are initialized by MPLAB ICD
2, MPLAB ICD 3, or MPLAB REAL ICE in-circuit
emulator, must not be cleared by the user application
firmware; otherwise, communication errors will result
between the debugger and the device.
If your application needs to use certain analog-to-digital
pins as analog input pins during the debug session, the
user application must clear the corresponding bits in
the AD1PCFGL register during initialization of the ADC
module.
When MPLAB ICD 2, MPLAB ICD 3, or MPLAB REAL
ICE in-circuit emulator is used as a programmer, the
user application firmware must correctly configure the
AD1PCFGL register. Automatic initialization of this
register is only done during debugger operation.
Failure to correctly configure the register(s) will result in
all analog-to-digital pins being recognized as analog
input pins, resulting in the port value being read as a
logic ‘0’, which may affect user application functionality.
2.9
Unused I/O pins should be configured as outputs and
driven to a logic-low state.
Alternately, connect a 1k to 10k resistor between V
and unused pins.
DS39997B-page 20
IN
< 8 MHz (for ECPLL mode) to comply with device
Oscillator Value Conditions on
Device Start-up
Configuration of Analog and
Digital Pins During ICSP
Operations
Unused I/Os
IN
< 8 MHz (for MSPLL mode) or 3 MHz <
Preliminary
SS
© 2011 Microchip Technology Inc.