MA240026 Microchip Technology, MA240026 Datasheet - Page 57

• Manufacturer Part Number: MA240026
• Description: Daughter Cards & OEM Boards PIC24FJ16MC102 Plug-In Module
• Manufacturer: Microchip Technology

Specifications of MA240026

• Rohs: yes
• Data Bus Width: 16 bit
• Description/function: PIC24F 28 Pin QFN to 100 Pin Plug-in-Module
• Interface Type: I2C, SPI, UART
• Maximum Operating Temperature: + 125 C
• Minimum Operating Temperature: - 40 C
• Operating Supply Voltage: 3 V to 3.6 V

6.1
The PIC24FJ16MC101/102 family of devices have two
types of Reset:
• Cold Reset
• Warm Reset
A cold Reset is the result of a POR or a BOR. On a cold
Reset, the FNOSC configuration bits in the FOSC
device configuration register selects the device clock
source.
TABLE 6-1:
© 2011 Microchip Technology Inc.
FRC, FRCDIV16, FRCDIVN
Note 1:
Oscillator Mode
2:
3:
System Reset
FRCPLL
MSPLL
ECPLL
SOSC
T
times vary with crystal characteristics, load capacitance, etc.
T
10 MHz crystal and T
T
LPRC
OSCD
OST
LOCK
MS
HS
EC
= Oscillator Start-up Timer Delay (1024 oscillator clock period). For example, T
OSCILLATOR DELAY
= Oscillator Start-up Delay (1.1 μs max for FRC, 70 μs max for LPRC). Crystal Oscillator start-up
= PLL lock time (1.5 ms nominal), if PLL is enabled.
OST
Startup Delay
Oscillator
T
T
T
T
T
T
T
= 32 ms for a 32 kHz crystal.
OSCD
OSCD
OSCD
OSCD
OSCD
OSCD
OSCD
—
—
Preliminary
Oscillator Startup
Timer
T
T
T
T
OST
OST
OST
OST
—
—
—
—
—
A warm Reset is the result of all other Reset sources,
including the RESET instruction. On warm Reset, the
device will continue to operate from the current clock
source as indicated by the Current Oscillator Selection
bits (COSC<2:0>) in the Oscillator Control register
(OSCCON<14:12>).
The device is kept in a Reset state until the system
power supplies have stabilized at appropriate levels
and the oscillator clock is ready. The sequence in
which this occurs is shown in
PIC24FJ16MC101/102
PLL Lock Time
T
T
T
LOCK
LOCK
LOCK
—
—
—
—
—
—
Figure
T
OSCD
OST
T
T
T
T
OSCD
Total Delay
OSCD
OSCD
OSCD
= 102.4 μs for a
DS39997B-page 57
6-2.
+ T
T
T
T
OSCD
OSCD
LOCK
OST
—
+ T
+ T
+ T
+ T
LOCK
+ T
OST
OST
OST
LOCK