S-24CS16A0I-D8S1G Seiko Instruments, S-24CS16A0I-D8S1G Datasheet
S-24CS16A0I-D8S1G
Specifications of S-24CS16A0I-D8S1G
Related parts for S-24CS16A0I-D8S1G
S-24CS16A0I-D8S1G Summary of contents
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... SOP(JEDEC) 8-Pin TSSOP WLP SNT-8A Caution This product is intended to use in general electronic devices such as consumer electronics, office equipment, and communications devices. Before using the product in medical equipment or automobile equipment including car audio, keyless entry and engine control unit, contact to SII is indispensable. ...
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... CMOS SERIAL E S-24CS16A Pin Configurations 8-Pin DIP Top view GND 4 5 Figure 1 S-24CS16A0I-D8S1G 8-Pin SOP(JEDEC) Top view GND Figure 2 S-24CS16A0I-J8T1G 2 2 PROM Pin No. Symbol * VCC * SCL 4 GND 5 SDA SDA 6 SCL VCC *1. Connect to GND or V *2. Connect to GND. Remark See Dimensions for details of the package drawings. ...
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... TSSOP Top view GND Figure 3 S-24CS16A0I-T8T1G WLP Bottom view VCC SCL GND SDA Figure 4 S-24CS16A0I-H6Tx Remark Please contact our sales office regarding the product with WLP package. SNT-8A Top view GND SDA 3 6 VCC SCL Figure 5 S-24CS16A0I-I8T1G Pin No. Symbol * VCC * ...
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... CMOS SERIAL E S-24CS16A Block Diagram SCL Start / Stop Detector SDA Device Address Comparator PROM Serial Clock Controller LOAD COMP LOAD INC R/W Address Counter Y Decoder D OUT Figure 6 Seiko Instruments Inc. Rev.5.2 VCC WP GND Voltage Detector High-Voltage Generator Data Register 2 E PROM ...
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... Input voltage Output voltage Operating ambient temperature Storage temperature Caution The absolute maximum ratings are rated values exceeding which the product could suffer physical damage. These values must therefore not be exceeded under any conditions. Recommended Operating Conditions Item Power supply voltage ...
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... CMOS SERIAL E S-24CS16A DC Electrical Characteristics Item Symbol Condition Current consumption I CC1 (READ) Current consumption I CC2 (WRITE) Item Symbol Condition Standby current consumption Input leakage GND current Output leakage GND OUT current Low level output voltage Current address V AH ...
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... F Bus release time t BUF Noise suppression time t I SCL t SU.STA SDA IN SDA OUT 0.1 × 0.9 × 0.5 × 100 pF + Pull-up resistor 1.0 k Ω Table 4 Min. Typ. Max. Min. 0 − 400 − − 1.0 1.0 − − 0.9 0.9 − ...
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... CMOS SERIAL E S-24CS16A Item Write time SCL SDA D0 Write data 8 2 PROM Table 14 V Symbol Min. − Stop Condition Acknowledge Figure 9 Write Cycle Timing Seiko Instruments Inc. = 2 Unit Typ. Max. 4.0 10 Start Condition Rev.5.2 00 ...
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... The SDA line is usually pulled up to the V 3. SCL (Serial Clock Input) Pin The SCL pin is used for serial clock input. Since signals are processed at the rising or falling edge of the SCL clock input signal, attention should be paid to the rising time and falling time to conform to the specifications. ...
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... Every operation begins from a start condition. 2. Stop Condition Stop is identified by a low to high transition of the SDA line while the SCL line is stable at high. When a device receives a stop condition during a read sequence, the read operation is interrupted, and the device enters standby mode. ...
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... SDA 4. Acknowledge The unit of data transmission is 8 bits. During the 9th clock cycle period the receiver on the bus pulls down the SDA line to acknowledge the receipt of the 8-bit data. When an internal write cycle is in progress, the device does not generate an acknowledge. ...
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... SDA bus. The 4 most significant bits of the device address are called the “Device Code”, and are fixed to “1010”. The successive 3 bits (P2, P1 and P0) are used to define a page address and choose the eight 256-byte memory blocks. ...
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... Rev.5.2 _00 6. Write 6. 1 Byte Write When the master sends a 7-bit device address and a 1-bit read / write instruction code set to “0”, following a start 2 condition, the E PROM acknowledges it. The E acknowledge. After the E condition and that initiates the write cycle at the addressed memory. ...
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... In S-24CS16A, the lower 4 bits of the word address are automatically incremented every time when the E receives 8-bit write data. If the size of the write data exceeds 16 bytes, the upper 4 bits of the word address and page address (P2, P1 and P0) remain unchanged, and the lower 4 bits are rolled over and previously received data will be overwritten ...
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... When the WP pin is connected to the GND, the write protection is invalid, and write operation in all memory area is available. Fix the level of the WP pin from the rising edge of SCL for loading the last write data (D0) until the end of the write time (10 ms max.). If the WP pin changes during this time, the address data being written at this time is not guaranteed ...
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... Attention should be paid to the following point on the recognition of the address pointer in the E In the read operation the memory address counter in the E edge of the SCL clock for the 8th bit of the output data. In the write operation, on the other hand, the upper bits of the memory address (the upper bits of the word address and page address) incremented at the falling edge of the SCL clock for the 8th bit of the received data ...
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... The E with an acknowledge. The memory address is loaded to the address counter in the E Reception of write data does not follow in a dummy write whereas reception of write data follows in a byte write and in a page write. Since the memory address is loaded into the memory address counter by dummy write, the master device can read the data starting from the arbitrary memory address by transmitting a new start condition and performing the same operation in the current address read ...
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... This is called “Sequential Read”. The master device outputs stop condition not an acknowledge, the reading of E Data can be read in succession in the sequential read mode. When the memory address counter reaches the last word address, it rolls over to the first memory address. ...
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... Address Increment Timing The timing for the automatic address increment is the falling edge of the SCL clock for the 8th bit of the read data in read operation and the falling edge of the SCL clock for the 8th bit of the received data in write operation. ...
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... PROM from malfunction due to an undefined output (high impedance) from the tri-state pin when the microprocessor is reset when the voltage drops. 2. I/O pin equivalent circuit The I/O pins of this IC do not include pull-up and pull-down resistors. The SDA pin is an open-drain output. The following shows the equivalent circuits. SCL ...
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... Start condition SCL SDA *1. After 9 clocks (dummy clocks), if the SCL clock continues to be output without a start condition being input, a write operation may be started upon receipt of a stop condition. To prevent this, input a start condition after 9 clocks (dummy clocks). Remark It is recommended to perform the above reset using dummy clocks when the system is initialized after the power supply voltage has been raised ...
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... For example, when the power supply voltage to be used is 5 supply voltage must be raised within 200 ms. V (Max.) INIT * means there is no difference in potential between the VCC pin and the GND pin of the E * the time required to initialize the E INIT 22 2 PROM as shown in Figure 27 ...
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... CC 3.0 [V] 2.0 Rise time (t 2 PROM supply voltage = 5.0 V, raise the power supply voltage to 5.0 V within 200 ms. Figure 28 Raising Time of Power Supply Voltage 2 2 PROM may malfunction unless the power-on-clear operation conditions Seiko Instruments Inc. 2-WIRE CMOS SERIAL E 50 100 ...
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... CMOS SERIAL E S-24CS16A 5. 2 Wait for the initialization sequence to end 2 The E PROM executes initialization during the time that the supply voltage is increasing to its normal value. All instructions must wait until after initialization. The relationship between the initialization time ( shown in Figure 29 . RISE ...
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... If a start/stop condition is mistakenly recognized during 2 communication, the E PROM enters the standby status recommended that SDA is delayed from the falling edge of SCL by 0.3 µ s minimum in the S-24CS16A. This is to prevent time lag caused by the load of the bus line from generating the stop (or start) condition. SCL SDA 7 ...
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... When write data is input more than defined page size at page write operation, for example, S-24CS16A (which can be executed 16-byte page write) is received data more than 17 byte, 8-bit data of the 17th byte is over written to the first byte in the same page. Data over the capacity of page address cannot be written. ...
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... In this package, the overcoat of the resin of translucence is carried out on the side of device area. Keep it mind that it may affect the characteristic of a device when exposed a device in the bottom of a high light source. ...
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... SCL DATA = 0101 500 I CC1 400 ( µ A) 300 200 100 ( PROM 1. 2 Current consumption (READ) I CC1 vs. Ambient temperature Current consumption (READ) I CC1 vs. Power supply voltage Current consumption (READ) I CC1 vs. Clock frequency Seiko Instruments Inc. CC1 100 kHz f SCL ...
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... CC2 (mA) 0.5 0 – (° Standby current consumption I vs. Ambient temperature 5 2 (µA) 1.0 0 – (° Current consumption (PROGRAM) I CC2 vs. Ambient temperature Ta I CC2 (mA Current consumption (PROGRAM) I CC2 vs. Power supply voltage V I CC2 (mA Input leakage current I SB vs. Ambient temperature (µA) 85 Seiko Instruments Inc. ...
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... CMOS SERIAL E S-24CS16A 1. 13 Input leakage current I vs. Ambient temperature 5 SDA, SCL 5 (µA) 0.5 0 – (° Output leakage current I vs. Ambient temperature SDA = 5 (µA) 0.5 0 – (° Low level output voltage V vs. Low level output current ° ...
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... Low input inversion voltage V vs. Power supply voltage °C SDA, SCL 3 2.0 ( Low power supply detection voltage −V vs. Ambient temperature Ta 2.0 –V DET (V) 1.0 0 – (° High input inversion voltage ( Low input inversion voltage Low power supply release voltage +V ...
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... Ta (° SDA output delay time t vs. Ambient temperature (µs) 0.5 0 – (° PROM 2. 2 Write time t MAX Write time SDA output delay time t AA vs. Ambient temperature Ta 85 Seiko Instruments Inc. vs. Power supply voltage ° (ms (V) CC vs. Ambient temperature ...
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... Rev.5.2 _00 2. 7 SDA output delay time t vs. Ambient temperature (µs) 0.5 0 – (° Seiko Instruments Inc. 2-WIRE CMOS SERIAL E S-24CS16A 2 PROM 33 ...
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... DIP, 8-Pin SOP(JEDEC), 8-Pin TSSOP, SNT-8A Packages S-24CS16A 0I - xxxx 2. WLP Package S-24CS16A 0I - Remark Please contact our sales office regarding the product with WLP package PROM G Package name (abbreviation) and IC packing specifications D8S1 : 8-Pin DIP, Tube J8T1 : 8-Pin SOP (JEDEC), Tape ...
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... Use of the information described herein for other purposes and/or reproduction or copying without the express permission of Seiko Instruments Inc. is strictly prohibited. The products described herein cannot be used as part of any device or equipment affecting the human body, such as exercise equipment, medical equipment, security systems, gas equipment, or any apparatus installed in airplanes and other vehicles, without prior written permission of Seiko Instruments Inc ...