IS61C1024AL-12TI ISSI, Integrated Silicon Solution Inc, IS61C1024AL-12TI Datasheet - Page 7

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IS61C1024AL-12TI

Manufacturer Part Number
IS61C1024AL-12TI
Description
IC SRAM 1MBIT 12NS 32TSOP
Manufacturer
ISSI, Integrated Silicon Solution Inc
Datasheet

Specifications of IS61C1024AL-12TI

Format - Memory
RAM
Memory Type
SRAM - Asynchronous
Memory Size
1M (128K x 8)
Speed
12ns
Interface
Parallel
Voltage - Supply
4.5 V ~ 5.5 V
Operating Temperature
-40°C ~ 85°C
Package / Case
32-TSOP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
IS61C1024AL, IS64C1024AL
WRITE CYCLE SWITCHING CHARACTERISTICS
Notes:
1. Test conditions assume signal transition times of 5 ns or less, timing reference levels of 1.5V, input pulse levels of 0 to 3.0V
2. The internal write time is defined by the overlap of CE1 LOW, CE2 HIGH and WE LOW. All signals must be in valid states to
3. Tested with OE HIGH.
4. Tested with the load in Figure 2. Transition is measured ±500 mV from steady-state voltage. Not 100% tested.
Integrated Silicon Solution, Inc. — www.issi.com —
Rev. B
01/24/05
Symbol
t
t
t
t
t
t
t
t
t
t
t
and output loading specified in Figure 1.
initiate a Write, but any one can go inactive to terminate the Write. The Data Input Setup and Hold timing are referenced to the
rising or falling edge of the signal that terminates the Write.
WC
SCE
SCE
AW
HA
SA
PWE
SD
HD
HZWE
LZWE
1
2
(3)
(4)
(4)
Parameter
Write Cycle Time
CE1 to Write End
CE2 to Write End
Address Setup Time to Write End
Address Hold from Write End
Address Setup Time
WE Pulse Width
Data Setup to Write End
Data Hold from Write End
WE LOW to High-Z Output
WE HIGH to Low-Z Output
1-800-379-4774
Min. Max.
12
10
10
10
10
0
0
7
0
2
(1,2)
-12 ns
(Over Operating Range, Standard and Low Power)
7
Min. Max.
15
12
12
12
12
10
0
0
0
2
-15 ns
7
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ISSI
®
7

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