MT46H16M16LFBF-6 IT:A Micron Technology Inc, MT46H16M16LFBF-6 IT:A Datasheet - Page 51

• Manufacturer Part Number: MT46H16M16LFBF-6 IT:A
• Description: IC DDR SDRAM 256MBIT 60VFBGA
• Manufacturer: Micron Technology Inc
• Type: DDR SDRAMr

Specifications of MT46H16M16LFBF-6 IT:A

• Format - Memory: RAM
• Memory Type: Mobile DDR SDRAM
• Memory Size: 256M (16Mx16)
• Speed: 166MHz
• Interface: Parallel
• Voltage - Supply: 1.7 V ~ 1.95 V
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 60-VFBGA
• Organization: 16Mx16
• Density: 256Mb
• Address Bus: 15b
• Access Time (max): 6.5/5ns
• Maximum Clock Rate: 166MHz
• Operating Supply Voltage (typ): 1.8V
• Package Type: VFBGA
• Operating Temp Range: -40C to 85C
• Operating Supply Voltage (max): 1.95V
• Operating Supply Voltage (min): 1.7V
• Supply Current: 100mA
• Pin Count: 60
• Mounting: Surface Mount
• Operating Temperature Classification: Industrial
• Lead Free Status / Rohs Status: Compliant
• Other names: Q3368612

Table 9:
PDF: 09005aef82091978 / Source: 09005aef8209195b
MT46H16M16LF__2.fm - Rev. H 6/08 EN
CKE
H
H
H
H
H
L
L
L
L
L
L
L
L
n - 1
CKE
H
H
H
H
H
L
L
L
L
L
L
L
L
Truth Table – CKE
Notes 1–5 apply to all commands in this table
n
Notes:
Active power-down
Deep power-down
(Precharge) power-down
SELF REFRESH
Active power-down
Deep power-down
(Precharge) Power-down
SELF REFRESH
Bank(s) active
All banks idle
All banks idle
All banks idle
Current State
10. 200µs of valid clocks and NOP (or DESELECT) commands are required before any other valid
11. Upon exit from deep power-down mode and after the 200µs, a PRECHARGE ALL command
1. CKE
2. Current state is the state of the DDR SDRAM immediately prior to clock edge n.
3. COMMAND
4. All states and sequences not shown are illegal or reserved.
5.
6. DESELECT or NOP commands should be issued on any clock edges occurring during the
7. The clock must toggle at least one time during the
8. DESELECT or NOP commands should be issued on any clock edges occurring during the
9. The clock must toggle at least one time during the
clock edge.
MAND
t
period.
period.
command is allowed.
is required, followed by the standard initialization sequence.
CKE pertains.
n
is the logic state of CKE at clock edge n; CKE
n
.
n
is the command registered at clock edge n; and ACTION
See Table 11 on page 54
BURST TERMINATE
DESELECT or NOP
DESELECT or NOP
DESELECT or NOP
DESELECT or NOP
DESELECT or NOP
DESELECT or NOP
AUTO REFRESH
Command
51
X
X
X
X
n
Micron Technology, Inc., reserves the right to change products or specifications without notice.
256Mb: x16, x32 Mobile DDR SDRAM
Action
Maintain active power-down
Maintain deep power-down
Maintain (precharge) power-down
Maintain SELF REFRESH
Exit active power-down
Exit deep power-down
Exit (precharge) power-down
Exit SELF REFRESH
Active power-down entry
Deep power-down entry
(Precharge) Power-down entry
SELF REFRESH entry
n - 1
t
t
XP period.
XSR period.
n
was the state of CKE at the previous
©2005 Micron Technology, Inc. All rights reserved.
n
is a result of COM-
Operations
Notes
10, 11
6, 7
6, 7
8, 9
t
t
XSR
XP