PSD4235G2-90UI STMicroelectronics, PSD4235G2-90UI Datasheet - Page 33

• Manufacturer Part Number: PSD4235G2-90UI
• Description: IC FLASH 4MBIT 90NS 80TQFP
• Manufacturer: STMicroelectronics

Specifications of PSD4235G2-90UI

• Format - Memory: FLASH
• Memory Type: FLASH
• Memory Size: 4M (512K x 8)
• Speed: 90ns
• Interface: Parallel
• Voltage - Supply: 4.5 V ~ 5.5 V
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 80-TQFP, 80-VQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 497-1969

PSD4235G2
6.17
PLD Array WRH
VM register
Table 25.
On reset, bit1-Bit4 are loaded to configurations that are selected by the user in PSDsoft
Express. bit0 and bit7 are always cleared on reset. bit0-Bit4 are active only when the device
is configured in Philips 80C51XA mode.
SR_code
Boot_code
FL_code
Boot_data
FL_data
Peripheral mode
Bit 7
Peripheral
mode
0: WRH/DBE input to the PLD AND array is connected.
1: WRH/DBE input to the PLD AND array is disconnected, saving power.
0 = PSEN cannot access SRAM in 80C51XA modes.
1 = PSEN can access SRAM in 80C51XA modes.
0 = PSEN cannot access Secondary NVM in 80C51XA modes.
1 = PSEN can access Secondary NVM in 80C51XA modes.
0 = PSEN cannot access Primary Flash memory in 80C51XA modes.
1 = PSEN can access Primary Flash memory in 80C51XA modes.
0 = RD cannot access Secondary NVM in 80C51XA modes.
1 = RD can access Secondary NVM in 80C51XA modes.
0 = RD cannot access Primary Flash memory in 80C51XA modes.
1 = RD can access Primary Flash memory in 80C51XA modes.
0 = Peripheral mode of Port F is disabled.
1 = Peripheral mode of Port F is enabled.
Bit 6
not used
(set to ’0’)
VM register
Bit 5
not used
(set to ’0’)
Bit 4
FL_data
Bit 3
Boot_data FL_code
Bit 2
Register bit definition
Bit 1
Boot_code SR_code
Bit 0
33/129