MT46H8M32LFB5-6:A TR Micron Technology Inc, MT46H8M32LFB5-6:A TR Datasheet - Page 42
![IC DDR SDRAM 256MBIT 90VFBGA](/photos/7/23/72313/mfg557-90-vfbga_sml.jpg)
MT46H8M32LFB5-6:A TR
Manufacturer Part Number
MT46H8M32LFB5-6:A TR
Description
IC DDR SDRAM 256MBIT 90VFBGA
Manufacturer
Micron Technology Inc
Type
DDR SDRAMr
Specifications of MT46H8M32LFB5-6:A TR
Format - Memory
RAM
Memory Type
Mobile DDR SDRAM
Memory Size
256M (8Mx32)
Speed
166MHz
Interface
Parallel
Voltage - Supply
1.7 V ~ 1.95 V
Operating Temperature
0°C ~ 70°C
Package / Case
90-VFBGA
Organization
8Mx32
Density
256Mb
Address Bus
14b
Access Time (max)
6.5/5ns
Maximum Clock Rate
166MHz
Operating Supply Voltage (typ)
1.8V
Package Type
VFBGA
Operating Temp Range
0C to 70C
Operating Supply Voltage (max)
1.95V
Operating Supply Voltage (min)
1.7V
Supply Current
120mA
Pin Count
90
Mounting
Surface Mount
Operating Temperature Classification
Commercial
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
557-1280-2
MT46H8M32LFB5-6:A TR
MT46H8M32LFB5-6:A TR
Figure 27:
PDF: 09005aef82091978 / Source: 09005aef8209195b
MT46H16M16LF__2.fm - Rev. H 6/08 EN
Command
Address
t
t
t
DQSS (NOM)
DQSS (MIN)
DQSS (MAX)
DQS
DQS
DQS
CK#
DM
DM
DM
DQ
DQ
DQ
CK
WRITE-to-READ – Interrupting
Bank a,
WRITE
Notes:
Col b
T0
t
t
t
DQSS
DQSS
DQSS
1. D
2. An interrupted burst of 4 is shown; two data elements are written.
3.
4. A10 is LOW with the WRITE command (auto precharge is disabled).
5. DQS is required at T2 and T2n (nominal case) to register DM.
6. If the burst of 8 was used, DM and DQS would be required at T3 and T3n because the READ
D
t
command would not mask these two data elements.
b
WTR is referenced from the first positive CK edge after the last data-in pair.
IN
IN
NOP
D
T1
b
b = data-in for column b; D
IN
b+1
D
D
b
IN
IN
T1n
b+1
D
IN
b+1
D
IN
NOP
T2
t
WTR
T2n
42
Bank a,
READ
Col n
T3
OUT
n = data-out for column n.
Micron Technology, Inc., reserves the right to change products or specifications without notice.
256Mb: x16, x32 Mobile DDR SDRAM
NOP
T4
Transitioning data
CL = 3
CL = 3
CL = 3
T5
NOP
©2005 Micron Technology, Inc. All rights reserved.
T5n
D
D
D
OUT
n
OUT
n
OUT
n
T6
Don’t Care
NOP
Operations
D
n+1
D
n+1
D
OUT
n+1
OUT
T6n
OUT