CY7C138-25JC Cypress Semiconductor Corp, CY7C138-25JC Datasheet - Page 8

• Manufacturer Part Number: CY7C138-25JC
• Description: IC SRAM 32KBIT 25NS 68PLCC
• Manufacturer: Cypress Semiconductor Corp

Specifications of CY7C138-25JC

• Format - Memory: RAM
• Memory Type: SRAM - Dual Port, Asynchronous
• Memory Size: 32K (4K x 8)
• Speed: 25ns
• Interface: Parallel
• Voltage - Supply: 4.5 V ~ 5.5 V
• Operating Temperature: 0°C ~ 70°C
• Package / Case: 68-PLCC
• Density: 32Kb
• Access Time (max): 25ns
• Sync/async: Asynchronous
• Architecture: Not Required
• Clock Freq (max): Not RequiredMHz
• Operating Supply Voltage (typ): 5V
• Address Bus: 12b
• Package Type: PLCC
• Operating Temp Range: 0C to 70C
• Number Of Ports: 2
• Supply Current: 180mA
• Operating Supply Voltage (min): 4.5V
• Operating Supply Voltage (max): 5.5V
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 68
• Word Size: 8b
• Number Of Words: 4K
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Other names: 428-1445

Switching Waveforms
Notes:
24. Data I/O pins enter high impedance when OE is held LOW during write.
25. CE = HIGH for the duration of the above timing (both write and read cycle).
SEM OR CE
Semaphore Read After Write Timing, Either Side
Write Cycle No. 2: R/W Three-States Data I/Os (Either Port)
DATA OUT
ADDRESS
DATAIN
A
0
SEM
–A
R/W
R/W
I/O
OE
2
0
t
SA
(continued)
VALID ADDRESS
t
AW
t
SA
WRITE CYCLE
t
t
PWE
SCE
t
SD
DATA
t
IN
HA
VALID
t
t
SCE
HD
[25]
t
AW
t
HZWE
t
WC
t
SWRD
8
[21, 23, 24]
t
PWE
t
SOP
t
SOP
READ CYCLE
t
t
SD
AA
VALID ADDRESS
HIGH IMPEDANCE
DATA VALID
t
ACE
t
DOE
t
HD
t
LZWE
DATA
t
HA
OUT
VALID
t
OHA
CY7C138
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