SDED5-004G-NCT SanDisk, SDED5-004G-NCT Datasheet - Page 3

• Manufacturer Part Number: SDED5-004G-NCT
• Description: IC MDOC H3 4GB FBGA
• Manufacturer: SanDisk

Specifications of SDED5-004G-NCT

• Format - Memory: FLASH
• Memory Type: FLASH - Nand
• Memory Size: 32G (4G x 8)
• Interface: Parallel
• Voltage - Supply: 1.65 V ~ 1.95 V
• Operating Temperature: -25°C ~ 85°C
• Package / Case: 115-FBGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Speed: -

Rev. 1.3
E
P
3
ROTECTION
NABLING
Enhanced performance by implementation
of:
Powerful data integrity with a robust Error
Detection Code/Error Correction Code
(EDC/ECC) specifically tailored for the most
advanced flash technology.
Strong flash endurance with TrueFFS
advanced flash management software.
Reduced complexity for the host system by
moving flash management functionality to
the device.
Plug & Play integration with the host
system, due to embedding TrueFFS within
the device itself.
Support for major mobile operating
systems (OSs), including Symbian OS,
Windows Mobile, Windows CE, Linux and
more.
Compatibility with major mobile CPUs
Performance:
16-byte Unique Identification (UID)
number.
14 configurable protected partitions for
data and code:
mDOC H3 8Gb/16Gb/32Gb/64Gb
- 115-ball Fine-Pitch Ball Grid
Array (FBGA) 12x18mm
Ball to ball compatible with
mDOC G3/G4/H1 families.
Multi-plane operations
DMA support
Burst operation
Dual Data RAM buffering
Read/Write Cache
Fast partition configuration
Sustained write: 4-8 MB/sec.
Sustained read: 15-25 MB/sec
Write protected
Read and Write protected
One Time Programmable (OTP)
& S
ECURITY
-
R
B
H
ELIABILITY AND
OOT
ARDWARE
Protected Bad Block Table.
Hardware on-the-fly Error Detection
Code/Error Correction Code (EDC/ECC),
based on a BCH algorithm, tailored for the
most advanced flash technology.
Data integrity after power failure.
Transparent bad-block management.
Dynamic and static wear-leveling.
32KB Programmable Boot Block with XIP
capability to replace boot ROM or NOR.
254KB Paged RAM IPL
Boot Agent for automatic download of
boot code to the Programmable Boot
Block.
Asynchronous Boot mode to enable ARM-
based CPUs, e.g. TI OMAP, Intel PXAxxx,
to boot without the need for external glue
logic.
Exceptional boot performance with Burst
operation and DMA support enhanced by
external clock.
Configurable interface: simple SRAM-like
or multiplexed address/data interface.
CPU compatibility, including:
mDOC H3 EFD Featuring Embedded TrueFFS Data Sheet
C
APABILITY
Protection key and LOCK# signal
Sticky Lock (SLOCK) to lock boot
partition
ARM-based CPUs
Texas Instruments OMAP, DBB
Marvell PXAxxx family
Infineon xGold family
Analog Devices (ADI) digital
Baseband devices
Freescale i.MXxx Application
processors and i.xx digital
Baseband devices
C
OMPATIBILITY
D
ATA
I
NTEGRITY
92-DS-1205-10