L6566ATR STMicroelectronics, L6566ATR Datasheet - Page 19

• Manufacturer Part Number: L6566ATR
• Description: IC CTRLR OVP UVLO 16SOIC
• Manufacturer: STMicroelectronics

Specifications of L6566ATR

• Output Isolation: Isolated
• Frequency Range: 93 ~ 107kHz
• Voltage - Input: 8 ~ 23 V
• Power (watts): 750mW
• Operating Temperature: -40°C ~ 150°C
• Package / Case: 16-SOIC (0.154", 3.90mm Width)
• For Use With: 497-8834 - BOARD DEMO FOR L6563/LL6566A497-6452 - BOARD EVAL FOR L6566B497-6451 - BOARD EVAL FOR L6566B497-6450 - BOARD EVAL FOR L6566B497-6449 - BOARD EVAL FOR L6566A
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 497-6296-2

L6566A
With reference to the timing diagram of
the voltage on the bulk capacitor (Vin) builds up and, at about 80 V, the HV generator is
enabled to operate (HV_EN is pulled high) so that it draws about 1 mA. This current, minus
the device’s consumption, charges the bypass capacitor connected from pin Vcc (5) to
ground and makes its voltage rise almost linearly.
Figure 6.
As the Vcc voltage reaches the start-up threshold (14 V typ.) the low-voltage chip starts
operating and the HV generator is cut off by the Vcc_OK signal asserted high. The device is
powered by the energy stored in the Vcc capacitor until the self-supply circuit (typically an
auxiliary winding of the transformer and a steering diode) develops a voltage high enough to
sustain the operation. The residual consumption of this circuit is just the one on the 15 MΩ
resistor (≈10 mW at 400 Vdc), typically 50-70 times lower, under the same conditions, as
compared to a standard start-up circuit made with external dropping resistors.
At converter power-down the system will lose regulation as soon as the input voltage is so
low that either peak current or maximum duty cycle limitation is tripped. Vcc will then drop
and stop IC activity as it falls below the UVLO threshold (10 V typ.). The Vcc_OK signal is
de-asserted as the Vcc voltage goes below a threshold Vcc
HV generator can now restart. However, if Vin < Vin
de-asserted too and the HV generator is disabled. This prevents converter’s restart attempts
and ensures monotonic output voltage decay at power-down in systems where brownout
protection (see the relevant section) is not used.
The low restart threshold Vcc
the device will have a very low repetition rate, as shown in the timing diagram of
page 20
Vcc_PFC
Vcc_OK
, and that the converter will work safely with extremely low power throughput.
(pin 6)
(pin 5)
(pin 4)
HV_EN
Vcc
0.85 mA
V
I
Vcc
Vcc
GD
charge
HVstart
Vcc
restart
Vin
OFF
ON
Timing diagram: normal power-up and power-down sequences
Power-on
restart
light load
ensures that, during short circuits, the restart attempts of
Figure 6
, when power is first applied to the converter
operation
heavy load
Normal
start
, as illustrated in
restart
located at about 5 V. The
Application information
Power-off
regulation is lost here
Figure 6
Figure 7 on
, HV_EN is
t
t
t
t
t
t
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