L6566ATR STMicroelectronics, L6566ATR Datasheet - Page 30

• Manufacturer Part Number: L6566ATR
• Description: IC CTRLR OVP UVLO 16SOIC
• Manufacturer: STMicroelectronics

Specifications of L6566ATR

• Output Isolation: Isolated
• Frequency Range: 93 ~ 107kHz
• Voltage - Input: 8 ~ 23 V
• Power (watts): 750mW
• Operating Temperature: -40°C ~ 150°C
• Package / Case: 16-SOIC (0.154", 3.90mm Width)
• For Use With: 497-8834 - BOARD DEMO FOR L6563/LL6566A497-6452 - BOARD EVAL FOR L6566B497-6451 - BOARD EVAL FOR L6566B497-6450 - BOARD EVAL FOR L6566B497-6449 - BOARD EVAL FOR L6566A
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 497-6296-2

Application information
5.7
30/51
Equation 8
where Lp is the inductance of the primary winding. In case a constant maximum power
capability vs. the input voltage is not required, the VFF pin can be grounded, directly or
through a resistor (see
setpoint at 1 V, or biased at a fixed voltage through a divider from VREF to get a lower
setpoint.
It is possible to bypass the pin to ground with a small film capacitor (e.g. 1-10 nF) to ensure
a clean operation of the IC even in a noisy environment.
The pin is internally forced to ground during UVLO, after activating any latched protection
and when pin COMP is pulled below its low clamp voltage (see
block on page 26
Hiccup-mode OCP
A third comparator senses the voltage on the current sense input and shuts down the device
if the voltage on the pin exceeds 1.5 V, a level well above that of the maximum overcurrent
setpoint (1 V). Such an anomalous condition is typically generated by either a short circuit of
the secondary rectifier or a shorted secondary winding or a hard-saturated flyback
transformer.
To distinguish an actual malfunction from a disturbance (e.g. induced during ESD tests), the
first time the comparator is tripped the protection circuit enters a “warning state”. If in the
next switching cycle the comparator is not tripped, a temporary disturbance is assumed and
the protection logic will be reset in its idle state; if the comparator will be tripped again a real
malfunction is assumed and the L6566A will be stopped. Depending on the time relationship
between the detected event and the oscillator, occasionally the device could stop after the
third detection.
This condition is latched as long as the device is supplied. While it is disabled, however, no
energy is coming from the self-supply circuit; hence the voltage on the Vcc capacitor will
decay and cross the UVLO threshold after some time, which clears the latch. The internal
start-up generator is still off, then the Vcc voltage still needs to go below its restart voltage
before the Vcc capacitor is charged again and the device restarted. Ultimately, this will result
in a low-frequency intermittent operation (Hiccup-mode operation), with very low stress on
the power circuit. This special condition is illustrated in the timing diagram of
).
Section 5.11: OVP block on page 35
k
opt
=
3
Rs
Td
Lp
), hence fixing the overcurrent
Section 5.5: PWM control
Figure 18
L6566A
.