L6566A STMicroelectronics, L6566A Datasheet

IC CTRLR OVP UVLO 16SOIC

L6566A

Manufacturer Part Number
L6566A
Description
IC CTRLR OVP UVLO 16SOIC
Manufacturer
STMicroelectronics
Datasheet

Specifications of L6566A

Output Isolation
Isolated
Frequency Range
93 ~ 107kHz
Voltage - Input
8 ~ 23 V
Power (watts)
750mW
Operating Temperature
-40°C ~ 150°C
Package / Case
16-SOIC (0.154", 3.90mm Width)
Output Current
800 mA
Output Power
750 mW
Input Voltage
8 V to 23 V
Operating Temperature Range
- 40 C to + 150 C
Mounting Style
SMD/SMT
Duty Cycle (max)
75 %
Universal Input Mains Range
90÷264Vac - Frequency 45 ÷ 65 Hz
Output Voltage
19 V@4 A continuous operation
Mains Harmonics
Acc. to EN61000-3-2 Class-D
St-by Mains Consumption
Less than 0.25 W @265Vac
Overall Efficiency
Better than 86%
Emi
According to EN55022-Class-B
Safety
According to EN60950
Low Profile Design
25 mm maximum height
Pcb Single Layer
single side, 70 μm, CEM-1, 78x174 mm, Mixed PTH/SMT
For Use With
497-8834 - BOARD DEMO FOR L6563/LL6566A497-6452 - BOARD EVAL FOR L6566B497-6451 - BOARD EVAL FOR L6566B497-6450 - BOARD EVAL FOR L6566B497-6449 - BOARD EVAL FOR L6566A
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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Features
Figure 1.
December 2008
Selectable multi-mode operation:
fixed frequency or quasi-resonant
On-board 700 V high-voltage start-up
Advanced light load management
Low quiescent current (< 3 mA)
Adaptive UVLO
Line feedforward for constant power capability
vs mains voltage
Pulse-by-pulse OCP, shutdown on overload
(latched or autorestart)
Transformer saturation detection
Switched supply rail for PFC controller
Latched or autorestart OVP
Brownout protection
-600/+800 mA totem pole gate driver with
active pull-down during UVLO
SO16N package
Block diagram
MODE/SC
Vcc_PFC
AC_OK
OSC
ZCD
V
HV
CC
I
Multi-mode controller for SMPS with PFC front-end
1
charge
5
100 mV
6
13
12
11
16
50 mV
3 V
15 µA
UVLO_SHF
ADAPTIVE UVLO
OSCILLATOR
REGULATOR
+
VOLTAGE
-
10
VREF
&
0.450V
0.485V
ZERO CURRENT
AC_FAIL
OCP2
DETECTOR
IC_LATCH
OVERVOLTAGE
PROTECTION
MODE SELECTION
FAULT MNGT
SOFT-START
TURN-ON LOGIC
+
-
14
SS
-
+
&
UVLO
Reference
Internal supply
voltages
&
AC_FAIL
UVLO
TIME
OUT
V
5.7V
400 uA
OVP
CC
COMP
Rev 3
9
BURST-MODE
OFF2
LOW CLAMP
TIME
OUT
Vth
& DISABLE
DISABLE
+
-
LATCH
Applications
OVPL
IC_LATCH
FEEDFORWARD
LINE VOLTAGE
Notebook, TV and LCD monitors adapters
High power chargers
PDP/LCD TV
Consumer appliances, like DVD, VCR, set-top
box
IT equipment, games, aux. power supplies
Power supplies in excess of 150 W
-
PWM
VFF
S
+
15
R
OFF2
-
Q
OCP
OVP
+
OCP2
Hiccup-mode
V
OCP logic
CC
+
DRIVER
-
7.7V
1 mA
GND
6.4V
3
1.5 V
-
V
14V
SO16N
Q
CC
LEB
-
OVPL
4.5V
7
4
8
CS
GD
DIS
L6566A
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Related parts for L6566A

L6566A Summary of contents

Page 1

... BURST-MODE + OSCILLATOR MODE SELECTION & TURN-ON LOGIC TIME ZERO CURRENT OUT OVPL - DETECTOR + OVP OVERVOLTAGE LATCH PROTECTION IC_LATCH - AC_FAIL DISABLE 15 µA 0.450V + UVLO 0.485V Rev 3 L6566A SO16N 6.4V - OVPL OVP LEB 7 1 OCP V CC Hiccup-mode 14V OCP logic OCP2 ...

Page 2

... PWM comparator, PWM latch and voltage feedforward blocks . . . . . . . . 27 5.7 Hiccup-mode OCP . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30 5.8 PFC interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31 5.9 Latched disable function . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32 5.10 Soft-start and delayed latched shutdown upon overcurrent . . . . . . . . . . . 33 5.11 OVP block . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35 5.12 Brownout protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38 5.13 Slope compensation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40 5.14 Summary of L6566A power management functions . . . . . . . . . . . . . . . . 41 2/51 L6566A ...

Page 3

... L6566A 6 Application examples and ideas . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44 7 Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 47 8 Order codes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 49 9 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50 Contents 3/51 ...

Page 4

... Table 1. Pin functions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 Table 2. Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 Table 3. Thermal data Table 4. Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 Table 5. L6566A light load management features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41 Table 6. L6566A protections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 42 Table 7. External circuits that determine IC behavior upon OVP and OCP . . . . . . . . . . . . . . . . . . . 45 Table 8. SO16N mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 48 Table 9. Order codes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 49 Table 10. ...

Page 5

... OVP function: timing diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36 Figure 24. Maximum allowed duty cycle vs switching frequency for correct OVP detection . . . . . . . . 37 Figure 25. Brownout protection: internal block diagram and timing diagram . . . . . . . . . . . . . . . . . . . . 38 Figure 26. AC voltage sensing with the L6566A . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39 Figure 27. Slope compensation waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40 Figure 28. Typical low-cost application schematic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44 Figure 29. ...

Page 6

... To allow meeting them in two-stage power-factor-corrected systems as well, the L6566A provides an interface with the PFC controller that enables to turn off the pre-regulator at light load. ...

Page 7

... Figure 2. Typical system block diagram PFC PRE-REGULATOR Rectified Mains Voltage FLYBACK DC-DC CONVERTER PWM/QR controller is turned off in case of PFC's anomalous operation, for safety L6563/A L6566A PFC PFC is automatically turned off at light load to ease compliance with energy saving specifications. Description V outdc 7/51 ...

Page 8

... Gate driver output. The totem pole output stage is able to drive power MOSFET’ and IGBT’s with a peak current capability of 800 mA source/sink. 8/ HVS HVS N.C. N. GND GND Vcc Vcc Vcc_PFC Vcc_PFC DIS DIS Function L6566A AC_OK AC_OK VFF VFF SS SS OSC OSC MODE/SC MODE/SC ZCD ZCD VREF VREF COMP COMP ...

Page 9

... L6566A Table 1. Pin functions (continued) N° Pin Supply voltage of both the signal part of the IC and the gate driver. The internal high voltage generator charges an electrolytic capacitor connected between this pin and GND (pin 3) as long as the voltage on the pin is below the turn-on threshold of the IC, after that it is disabled and the chip is turned on ...

Page 10

... OSC the oscillator frequency that defines the maximum allowed switching frequency of the L6566A, if working in QR mode, or the operating switching frequency if working in FF mode. Soft-start current source. At start-up a capacitor Css between this pin and GND (pin 3) is charged with an internal current generator. During the ramp, the internal ...

Page 11

... L6566A 3 Electrical data 3.1 Maximum rating Table 2. Absolute maximum ratings Symbol Pin V HVS I HVS Vcc_PFC I Vcc_PFC 10, 14 max V 9, 15, 16 max I 11 ZCD V 12 MODE/ OSC P TOT T STG T J 3.2 Thermal data Table 3. Thermal data Symbol R Thermal resistance junction to ambient thJA ...

Page 12

... Vcc V > Vcc > Hvstart V > Vcc > Hvstart V > Vcc = 0 HV Hvstart V = 400 V HV Vcc falling (1) IC latched off (1) Disabled by V < V COMP COMPOFF L6566A , kΩ from OSC to REF T Min Typ Max 10 9.4 10 10.6 7.2 7.6 8 200 250 = 1 V 2.6 2 ...

Page 13

... L6566A Table 4. Electrical characteristics (continued) Symbol Parameter Reference voltage V Output voltage REF V Total variation REF I Short circuit current REF Sink capability in UVLO V Overvoltage threshold OV Internal oscillator f Oscillation frequency sw V Voltage reference OSC D Maximum duty cycle max Brownout protection Vth Threshold voltage ...

Page 14

... V < V COMP COMPSH V < ZCD COMP COMPHI ZCD ZCDL ZCD ZCDH After gate-drive going low After gate-drive going low L6566A Min. Typ. Max. Unit -1 µA 150 250 300 ns 100 ns 0.92 1 1.08 0.45 0.5 0. 0.1 1.4 1.5 1 ...

Page 15

... L6566A Table 4. Electrical characteristics (continued) Symbol Parameter Latched shutdown function I Input bias current OTP V Disable threshold OTP Thermal shutdown Vth Shutdown threshold Hys Hysteresis V _PFC function CC I OFF-state leakage current leak V - Vcc ON-state voltage dropout V Vcc_PFC Level for pin 6 open and lower ...

Page 16

... Table 6 on page 41 and Table 7 on page 42 3. The voltage feedforward block output is given by: 16/51 Test condition mA, Vcc = 12V GDsource I = 100 mA GDsink mA; Vcc = 20 V GDsource Vcc = ccon sink ( ) = − − COMP FF L6566A Min. Typ. Max. Unit 9 0.75 V -0 0.9 1.1 V VFF ...

Page 17

... Valley-skipping mode at medium/ light load. The externally programmable oscillator of the L6566A, synchronized to MOSFET's turn-on, enables the designer to define the maximum operating frequency of the converter. As the load is reduced MOSFET's turn- on will not any more occur on the first valley but on the second one, the third one and so on ...

Page 18

... Burst-mode with no or very light load. This kind of operation is activated in the same way and results in the same behavior as previously described for QR operation. The L6566A is specifically designed for flyback converters operated from front-end power factor correction (PFC) stages in applications supposed to comply with EN61000-3-2 or JEITA-MITI regulations ...

Page 19

... L6566A With reference to the timing diagram of the voltage on the bulk capacitor (Vin) builds up and, at about 80 V, the HV generator is enabled to operate (HV_EN is pulled high) so that it draws about 1 mA. This current, minus the device’s consumption, charges the bypass capacitor connected from pin Vcc (5) to ground and makes its voltage rise almost linearly ...

Page 20

... L6566A ZCD 20/51 Short circuit occurs here < 0.03T COMP 9 blanking START BLANKING 5.7V TIME TURN-ON - MONO LOGIC STABLE + 100 OSCILLATOR Strobe Reset FAULT + 4:1 S/H Counter - 5V T rep rep VFF 15 line FFWD PWM DRIVER S 13 OSC R T L6566A +Vin Q Rs ...

Page 21

... This feature is typically used to detect transformer demagnetization for QR operation, where the signal for the ZCD input is obtained from the transformer’s auxiliary winding used also to supply the L6566A. The triggering block is blanked for T turn-off to prevent any negative-going edge that follows leakage inductance demagnetization from triggering the ZCD circuit erroneously ...

Page 22

... As a consequence, the maximum switching frequency will be a little and valley-skipping mode may take place slightly osc for further implications of T BLANK Ns Vout > Naux the maximum pull-up current (130 μ A). ZCD after MOSFET’s BLANK osc = 150 kHz, the osc Section 5.11: OVP . ZCD L6566A osc ...

Page 23

... L6566A The operation described so far under different operating conditions for the converter is illustrated in the timing diagrams of If the FF option is selected the operation will be exactly equal to that of a standard current- mode PWM controller. It will work at a frequency fsw = fosc; both DCM and CCM transformer's operation are possible, depending on the operating conditions (input voltage and output load) and on the design of the power stage ...

Page 24

... Burst-mode operation at no load or very light load When the voltage at the COMP pin (9) falls 20 mV below a threshold fixed internally at a value depending on the selected operating mode, the L6566A is disabled with COMPBM the MOSFET kept in OFF state and its consumption reduced at a lower value to minimize Vcc capacitor discharge ...

Page 25

... Chapter 5.8: PFC interface on page 31 COMPL VCOMP (pin 9) Vcc V 5 COMPL V COMPO + Vcc - (pin 5) R UVLO Vcc S Q Vcc + SW - Vcc Vcc OFF1 OFF2 (*) L6566A Vcc_PFC (pin 6) Application information internally fixed (see "PFC Figure 13 ). The normal UVLO threshold t OFF1 OFF2 Tdelay t ") and 25/51 ...

Page 26

... The dynamics of the pin is in the 2 range. The voltage at the pin is clamped downwards at about the clamp is externally overridden and the voltage on the pin is pulled below 1.4 V the L6566A will shut down. This condition is latched as long as the device is supplied. While the device is disabled, however, no energy is coming from the self- supply circuit, thus the voltage on the Vcc capacitor will decay and cross the UVLO threshold after some time, which clears the latch and lets the HV generator restart ...

Page 27

... In this case the issue is still there, although not as big as without PFC and wide-range mains. With a 1:2 voltage change, the maximum transferable power at maximum line can higher than at minimum line, as shown by the upper curve in the diagram of The L6566A has the line feedforward function available to solve this issue. Standby is commanded here ON ...

Page 28

... VFF V = − = − VFF csx 3 Figure 17 on page 29 shows also how the function is included , which minimizes the power capability variation over the input opt V = ⋅ opt ⋅ min in max in min opt 3 3 Vin 3 can be found: opt ) + ⋅ max R L6566A ...

Page 29

... Rs I PKp PFC Output Bus To PFC's OV R1A sensing R1B R2 15 COMP 9 2.5 3 3.5 L6566A > Pout @ Vin the system is still undercompensated and k needs lim min @ Vin < Pout @ Vin lim max lim min in this way possible that Pout opt ”). The overcurrent setpoint will be then fixed at the ...

Page 30

... L6566A will be stopped. Depending on the time relationship between the detected event and the oscillator, occasionally the device could stop after the third detection ...

Page 31

... Then the PFC pre-regulator can be turned off, thus saving the no-load consumption of this stage (0.5÷1 W so, the L6566A provides the Vcc_PFC pin (6): this pin is internally connected to the Vcc pin (5) via a PNP transistor, normally closed, that opens when the voltage V below V ...

Page 32

... HV generator in this way cuts its power dissipation approximately by three (as compared to the case of continuous conduction) and keeps peak silicon temperature close to the average value. To let the L6566A restart it is then necessary to disconnect the converter from the input source. Pulling pin 16 (AC_OK) below the disable threshold (see protection on page 38 latch can be cleared and a quicker restart is allowed as the input source is removed ...

Page 33

... A control loop failure results in an output overvoltage that is handled by the OVP function of the L6566A (see next section). In case of QR operation, a short circuit causes the converter to run at a very low frequency, then with very low power capability ...

Page 34

... Vcc_PFC (pin 6) START-UP NORMAL OPERATION Note: Unlike other PWM controllers provided with a soft-start pin, in the L6566A grounding the SS pin does not guarantee that the gate driver is disabled. 34/51 over 5 V, the device will be latched off. In the former case the BE section ( Vcc falls below UVLO ...

Page 35

... An internal current generator is activated that sources 1 mA out of the VFF pin (15). If the VFF voltage is allowed to reach 2 Vbe over 5 V, the L6566A will be latched off. See disable function on page 32 impedance externally connected to pin low that the 5+2 V reached or if some means is provided to prevent that, the device will be able to restart after the Vcc has dropped below 5 V. Refer to the “ ...

Page 36

... OVP comparator is active only for a small time window (typically, 0.5 µs) starting 2 µs after MOSFET’s turn-off, to reject the voltage spike associated to the positive-going edges of the voltage across the auxiliary winding Vaux; second, to stop the L6566A the OVP comparator must be triggered for four consecutive switching cycles. A counter, which is reset every time the OVP comparator is not triggered in one switching cycle, is provided to this purpose ...

Page 37

... L6566A Figure 22 on page 35 Figure 23 on page 36 Note: To use the OVP function effectively, i.e. to ensure that the OVP comparator will be always interrogated during MOSFET’s OFF-time, the duty cycle D under open-loop conditions must fulfill the following inequality: Equation 12 where µs; this is also illustrated in the diagram of BLANK2 Figure 24 ...

Page 38

... Finally, spurious restarts may occur during converter power down, hence causing the output voltage not to decay to zero monotonically. L6566A shutdown upon brownout is accomplished by means of an internal comparator, as shown in the block diagram of input of the comparator, available on the AC_OK pin (16), is supposed to sense a voltage proportional to either the RMS or the peak mains voltage ...

Page 39

... OFF (Vsen ON Equation 13 Vsen which, solved for R Equation Figure 26. AC voltage sensing with the L6566A L6561 L6562/A L6563 typically convenient not to use additional dividers connected to high-voltage rails because this could make it difficult to meet no-load consumption targets envisaged by energy-saving regulations. use of the divider already used by the PFC control chip to sense the ac mains voltage with just the addition of an extra tap ...

Page 40

... If slope compensation is not required with FF operation, the pin shall be left floating. 40/ )·C at least 4-5 times the maximum line cycle period the right-hand side; other sensing techniques can be GD (pin 4) Figure 27 needs to be quite a big external component other than the L6566A ...

Page 41

... L6566A 5.14 Summary of L6566A power management functions It has been seen that the device is provided with a number of power management functions: multiple operating mode upon loading conditions, protection functions, as well as interaction with the PFC pre-regulator. To help the designer familiarize with these functions, in the following tables all of theme are summarized with their respective activation mechanism and the resulting status of the most important pins ...

Page 42

... Application information Table 6. L6566A protections Protection Description Caused by V >V ZCD for 4 h consecutive Output switching OVP overvoltage cycles protection VFF > VFFlatch V COMP =V COMPHi V > SS Output V SSDIS OLP overload V protection COMP =V COMPHi V > SSLAT V COMP =V COMPHi V > SS Output short (4) V Short circuit ...

Page 43

... L6566A Table 6. L6566A protections (continued) Protection Description Caused by Shutdown V < 9. going ( cc VCOMP V below V COMPL ccoff ADAPTIVE (lowering of UVLO V < 7. ccoff ( threshold at VCOMP V light load) COMPO 1. Use One external diode from Use one external diode from SS (#14 and the V capacitor are such that V ...

Page 44

... PFC controller Vcc_PFC AC_OK 6 VFF 15 IC1 L6566A DIS VREF OSC R13 MODE/SC NTC2 R12 44/ HVS Vcc ZCD COMP GND Optional operation 1N4148 HVS Vcc R3 ZCD 1N4148 R18 SS COMP GND C8A IC3 TL431 C8A 2 IC3 PC817A TL431 L6566A Vout R10 Vout R10 ...

Page 45

... R L6566A FF 15 VFF R needed if R < 4.7 k Ω Application examples and ideas C8A 2 IC3 PC817A TL431 OVP auto-restart SS AC_OK L6566A 15 VFF R L Diode needed if R > 4.7 k Ω L 1N4148 SS AC_OK L6566A 15 VFF R L Diode needed if R > 4.7 k Ω L Vout R10 VREF 10 VREF ...

Page 46

... Application examples and ideas Figure 31. Frequency foldback at light load (FF operation) Figure 32. Latched shutdown upon mains overvoltage Vcc L6566A 46/51 MODE/SC Vref L6566A 13 OSC R T Vin BC847 5 DIS 8 15 VFF > COMP BC857 BC857 Vref DIS 10 8 L6566A 15 VFF L6566A Vin Rq ...

Page 47

... L6566A 7 Package mechanical data In order to meet environmental requirements, ST offers these devices in ECOPACK packages. These packages have a lead-free second level interconnect. The category of second Level Interconnect is marked on the package and on the inner box label, in compliance with JEDEC Standard JESD97. The maximum ratings related to soldering conditions are also marked on the inner box label ...

Page 48

... Min Typ 0.004 0.014 0.007 0.020 (typ.) 0.386 0.228 0.050 0.350 0.150 0.181 0.150 8°(max.) L6566A Max 0.069 0.009 0.063 0.018 0.010 0.394 0.244 0.157 0.208 0.050 0.024 ...

Page 49

... L6566A 8 Order codes Table 9. Order codes Order codes L6566A L6566ATR Package Packaging SO16N SO16N Tape and reel Order codes Tube 49/51 ...

Page 50

... Revision history 9 Revision history Table 10. Document revision history Date 20-Aug-2007 29-May-2008 02-Dec-2008 50/51 Revision 1 First release 2 Updated V value MODE/SC 3 Updated Figure 1 on page 1 Changes Table 2 on page 11 and Section 5.6 on page 27 L6566A ...

Page 51

... L6566A Information in this document is provided solely in connection with ST products. STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, modifications or improvements, to this document, and the products and services described herein at any time, without notice. All ST products are sold pursuant to ST’s terms and conditions of sale. ...

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