L6566A STMicroelectronics, L6566A Datasheet - Page 5

• Manufacturer Part Number: L6566A
• Description: IC CTRLR OVP UVLO 16SOIC
• Manufacturer: STMicroelectronics

Specifications of L6566A

• Output Isolation: Isolated
• Frequency Range: 93 ~ 107kHz
• Voltage - Input: 8 ~ 23 V
• Power (watts): 750mW
• Operating Temperature: -40°C ~ 150°C
• Package / Case: 16-SOIC (0.154", 3.90mm Width)
• Output Current: 800 mA
• Output Power: 750 mW
• Input Voltage: 8 V to 23 V
• Operating Temperature Range: - 40 C to + 150 C
• Mounting Style: SMD/SMT
• Duty Cycle (max): 75 %
• Universal Input Mains Range: 90÷264Vac - Frequency 45 ÷ 65 Hz
• Output Voltage: 19 V@4 A continuous operation
• Mains Harmonics: Acc. to EN61000-3-2 Class-D
• St-by Mains Consumption: Less than 0.25 W @265Vac
• Overall Efficiency: Better than 86%
• Emi: According to EN55022-Class-B
• Safety: According to EN60950
• Low Profile Design: 25 mm maximum height
• Pcb Single Layer: single side, 70 μm, CEM-1, 78x174 mm, Mixed PTH/SMT
• For Use With: 497-8834 - BOARD DEMO FOR L6563/LL6566A497-6452 - BOARD EVAL FOR L6566B497-6451 - BOARD EVAL FOR L6566B497-6450 - BOARD EVAL FOR L6566B497-6449 - BOARD EVAL FOR L6566A
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

L6566A
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Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Typical system block diagram. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Pin connection (through top view) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Multi-mode operation with QR option active . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
High-voltage start-up generator: internal schematic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Timing diagram: normal power-up and power-down sequences . . . . . . . . . . . . . . . . . . . . 19
Timing diagram showing short-circuit behavior (SS pin clamped at 5 V) . . . . . . . . . . . . . . 20
Zero current detection block, triggering block, oscillator block and related logic . . . . . . . . 20
Drain ringing cycle skipping as the load is gradually reduced . . . . . . . . . . . . . . . . . . . . . . 21
Operation of ZCD, triggering and oscillator blocks (QR option active) . . . . . . . . . . . . . . . . 23
Load-dependent operating modes: timing diagrams . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
Addition of an offset to the current sense lowers the burst-mode operation threshold . . . . 25
Possible feedback configurations that can be used with the L6566A . . . . . . . . . . . . . . . . . 26
Externally controlled burst-mode operation by driving pin COMP: timing diagram. . . . . . . 27
Typical power capability change vs input voltage in QR flyback converters . . . . . . . . . . . 28
Left: overcurrent setpoint vs VFF voltage; right: line feedforward function block . . . . . . . . 29
Hiccup-mode OCP: timing diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31
Possible interfaces between the L6566A and a PFC controller . . . . . . . . . . . . . . . . . . . . . 32
Operation after latched disable activation: timing diagram . . . . . . . . . . . . . . . . . . . . . . . . . 33
Soft-start pin operation under different operating conditions and settings . . . . . . . . . . . . . 34
OVP Function: internal block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35
OVP function: timing diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36
Maximum allowed duty cycle vs switching frequency for correct OVP detection . . . . . . . . 37
Brownout protection: internal block diagram and timing diagram . . . . . . . . . . . . . . . . . . . . 38
AC voltage sensing with the L6566A . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39
Slope compensation waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40
Typical low-cost application schematic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44
Typical full-feature application schematic (QR operation) . . . . . . . . . . . . . . . . . . . . . . . . . 44
Typical full-feature application schematic (FF operation) . . . . . . . . . . . . . . . . . . . . . . . . . . 45
Frequency foldback at light load (FF operation) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 46
Latched shutdown upon mains overvoltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 46
Adaptive UVLO block. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
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