L6566A STMicroelectronics, L6566A Datasheet - Page 36

• Manufacturer Part Number: L6566A
• Description: IC CTRLR OVP UVLO 16SOIC
• Manufacturer: STMicroelectronics

Specifications of L6566A

• Output Isolation: Isolated
• Frequency Range: 93 ~ 107kHz
• Voltage - Input: 8 ~ 23 V
• Power (watts): 750mW
• Operating Temperature: -40°C ~ 150°C
• Package / Case: 16-SOIC (0.154", 3.90mm Width)
• Output Current: 800 mA
• Output Power: 750 mW
• Input Voltage: 8 V to 23 V
• Operating Temperature Range: - 40 C to + 150 C
• Mounting Style: SMD/SMT
• Duty Cycle (max): 75 %
• Universal Input Mains Range: 90÷264Vac - Frequency 45 ÷ 65 Hz
• Output Voltage: 19 V@4 A continuous operation
• Mains Harmonics: Acc. to EN61000-3-2 Class-D
• St-by Mains Consumption: Less than 0.25 W @265Vac
• Overall Efficiency: Better than 86%
• Emi: According to EN55022-Class-B
• Safety: According to EN60950
• Low Profile Design: 25 mm maximum height
• Pcb Single Layer: single side, 70 μm, CEM-1, 78x174 mm, Mixed PTH/SMT
• For Use With: 497-8834 - BOARD DEMO FOR L6563/LL6566A497-6452 - BOARD EVAL FOR L6566B497-6451 - BOARD EVAL FOR L6566B497-6450 - BOARD EVAL FOR L6566B497-6449 - BOARD EVAL FOR L6566A
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Application information
36/51
Figure 23. OVP function: timing diagram
The ZCD pin will be connected to the auxiliary winding through a resistor divider R
(see
to:
Equation 10
where Vout
number of the secondary winding and Naux the turn number of the auxiliary winding. The
value of R
capability of the internal clamp:
Equation 11
where Vin
winding. See
page 21
To reduce sensitivity to noise and prevent the latch from being erroneously activated, first
the OVP comparator is active only for a small time window (typically, 0.5 µs) starting 2 µs
after MOSFET’s turn-off, to reject the voltage spike associated to the positive-going edges
of the voltage across the auxiliary winding Vaux; second, to stop the L6566A the OVP
comparator must be triggered for four consecutive switching cycles. A counter, which is
reset every time the OVP comparator is not triggered in one switching cycle, is provided to
this purpose.
COUNTER
COUNTER
STATUS
RESET
Vcc_PFC
STROBE
(pin 11)
(pin 6)
(pin 4)
FAULT
COUT
ZCD
GD
Vaux
5V
OVP
Figure 8 on page 20
0
for additional details.
0
Z1
max
NORMAL OPERATION
OVP
will be such that the current sourced by the ZCD pin be within the rated
Section 5.2: Zero current detection and triggering block; oscillator block on
2 µs
is the maximum dc input voltage and Ns the turn number of the primary
is the output voltage value that is to activate the protection, Ns the turn
0
0.5 µs
0
). The divider ratio k
0 → 1
TEMPORARY DISTURBANCE
R
Z
k
1
OVP
≥
1 → 2
3
=
⋅
10
1
Vout
−
2 → 0
3
OVP
5
Naux
OVP
Np
= R
Naux
0
Ns
Vin
Z2
/ (R
max
0 → 1
Z1
FEEDBACK LOOP FAILURE
+ R
Z2
1 → 2
) will be chosen equal
2 → 3
3 → 4
Z1
L6566A
, R
Z2
t
t
t
t
t
t
t
t
t
t