L6566A STMicroelectronics, L6566A Datasheet - Page 24

IC CTRLR OVP UVLO 16SOIC

L6566A

Manufacturer Part Number
L6566A
Description
IC CTRLR OVP UVLO 16SOIC
Manufacturer
STMicroelectronics
Datasheet

Specifications of L6566A

Output Isolation
Isolated
Frequency Range
93 ~ 107kHz
Voltage - Input
8 ~ 23 V
Power (watts)
750mW
Operating Temperature
-40°C ~ 150°C
Package / Case
16-SOIC (0.154", 3.90mm Width)
Output Current
800 mA
Output Power
750 mW
Input Voltage
8 V to 23 V
Operating Temperature Range
- 40 C to + 150 C
Mounting Style
SMD/SMT
Duty Cycle (max)
75 %
Universal Input Mains Range
90÷264Vac - Frequency 45 ÷ 65 Hz
Output Voltage
19 V@4 A continuous operation
Mains Harmonics
Acc. to EN61000-3-2 Class-D
St-by Mains Consumption
Less than 0.25 W @265Vac
Overall Efficiency
Better than 86%
Emi
According to EN55022-Class-B
Safety
According to EN60950
Low Profile Design
25 mm maximum height
Pcb Single Layer
single side, 70 μm, CEM-1, 78x174 mm, Mixed PTH/SMT
For Use With
497-8834 - BOARD DEMO FOR L6563/LL6566A497-6452 - BOARD EVAL FOR L6566B497-6451 - BOARD EVAL FOR L6566B497-6450 - BOARD EVAL FOR L6566B497-6449 - BOARD EVAL FOR L6566A
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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Application information
5.3
Note:
24/51
Burst-mode operation at no load or very light load
When the voltage at the COMP pin (9) falls 20 mV below a threshold fixed internally at a
value, V
the MOSFET kept in OFF state and its consumption reduced at a lower value to minimize
Vcc capacitor discharge.
The control voltage now will increase as a result of the feedback reaction to the energy
delivery stop (the output voltage will be slowly decaying), the threshold will be exceeded and
the device will restart switching again. In this way the converter will work in burst-mode with
a nearly constant peak current defined by the internal disable level. A load decrease will
then cause a frequency reduction, which can go down even to few hundred hertz, thus
minimizing all frequency-related losses and making it easier to comply with energy saving
regulations. This kind of operation, shown in the timing diagrams of
others previously described, is noise-free since the peak current is low.
If it is necessary to decrease the intervention threshold of the burst-mode operation, this can
be done by adding a small DC offset on the current sense pin as shown in
page 25
The offset reduces the available dynamics of the current signal; thereby, the value of the
sense resistor must be determined taking this offset into account.
Figure 11. Load-dependent operating modes: timing diagrams
MODE/SC=Open
MODE/SC=VREF
(pin 4)
COMPBM
COMP
(pin 9)
.
V
COMPBM
GD
f
f
sw
osc
, depending on the selected operating mode, the L6566A is disabled with
QR Mode
FF Mode
Valley-skipping Mode
Burst-mode
Burst-mode
Figure 11
FF Mode
Figure 12 on
MODE/SC=Open
MODE/SC=VREF
along with the
QR Mode
hyster.
20 mV
L6566A
t
t
t

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