LTC4257IS8-1 Linear Technology, LTC4257IS8-1 Datasheet - Page 10

• Manufacturer Part Number: LTC4257IS8-1
• Description: IC CONTROLLER POE INTERFAC 8SOIC
• Manufacturer: Linear Technology
• Type: Power over Ethernet Switch (PoE)r

Specifications of LTC4257IS8-1

• Applications: IP Phones, Power over LAN, Network Routers and Switches
• Internal Switch(s): Yes
• Current Limit: 350mA
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 8-SOIC (0.154", 3.90mm Width)
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

APPLICATIO S I FOR ATIO
LTC4257-1
Undervoltage Lockout
The IEEE specification dictates a maximum turn-on volt-
age of 42V and a minimum turn-off voltage of 30V for the
PD. In addition, the PD must maintain large on-off hyster-
esis to prevent resistive losses in the wiring between the
PSE and the PD from causing start-up oscillation. The
LTC4257-1 incorporates an undervoltage lockout (UVLO)
circuit that monitors line voltage to determine when to
apply power to the PD load (Figure 6). Before power is
applied to the load, the V
sitting at ground potential since there is no charge on
capacitor C1. When the input voltage rises above the UVLO
turn-on threshold, the LTC4257-1 removes the classifica-
tion load current and turns on the internal power MOSFET.
C1 charges up under LTC4257-1 current limit control and
the V
shown in Figure 1. The LTC4257-1 includes a hysteretic
UVLO circuit that keeps power applied to the load until the
input voltage falls below the UVLO turn-off threshold.
10
OUT
pin transitions from 0V to V
U
U
OUT
pin is high impedance and
PSE
TO
W
4
IN
V
LTC4257-1
INPUT
VOLTAGE
0V TO UVLO*
>UVLO*
*UVLO INCLUDES HYSTERESIS
RISING INPUT THRESHOLD ≅ –36V
FALLING INPUT THRESHOLD ≅ –30.5V
. This sequence is
IN
Figure 6. LTC4257-1 Undervoltage Lockout
UNDERVOLTAGE
LOCKOUT
CIRCUIT
U
POWER MOSFET
LTC4257-1
OFF
ON
Once the input voltage drops below –30V, the internal
power MOSFET is turned off and the classification load
current is re-enabled. C1 will discharge through the PD
circuitry and the V
Input Current Limit
IEEE 802.3af specifies a maximum inrush current and also
specifies a minimum load capacitor between the GND and
V
the LTC4257-1 integrates a dual level current limit circuit
with an onboard power MOSFET and sense resistor to
provide a complete inrush control circuit without additional
external components. At turn on, the LTC4257-1 will limit
input current to the low level, allowing the load capacitor
to ramp up to the line voltage in a controlled manner.
The LTC4257-1 has been specifically designed to interface
with legacy PSEs which do not meet the inrush current
requirement of the IEEE 802.3af specification. This is
V
GND
OUT
OUT
8
5
pins. To control turn-on surge current in the system,
CURRENT-LIMITED
TURN ON
MIN
5µF
C1
+
42571 F06
OUT
LOAD
PD
pin will go to a high impedance state.
42571fb