LTC4257IS8-1 Linear Technology, LTC4257IS8-1 Datasheet - Page 8

• Manufacturer Part Number: LTC4257IS8-1
• Description: IC CONTROLLER POE INTERFAC 8SOIC
• Manufacturer: Linear Technology
• Type: Power over Ethernet Switch (PoE)r

Specifications of LTC4257IS8-1

• Applications: IP Phones, Power over LAN, Network Routers and Switches
• Internal Switch(s): Yes
• Current Limit: 350mA
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 8-SOIC (0.154", 3.90mm Width)
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

APPLICATIO S I FOR ATIO
LTC4257-1
The power applied to a PD is allowed to use either of two
polarities and the PD must be able to accept this power so
it is common to install a diode bridge on the input. The
LTC4257-1 is designed to compensate for the voltage and
resistance effects of these two series diodes. The signa-
ture range extends below the IEEE range to accommodate
the voltage drop of the diodes. The IEEE specification
requires the PSE to use a ∆V/∆I measurement technique
to keep the DC offset of these diodes from affecting the
signature resistance measurement. However, the diode
resistance appears in series with the signature resistor
and must be included in the overall signature resistance
of the PD. The LTC4257-1 compensates for the two series
diodes in the signature path by offsetting the resistance
so that a PD built using the LTC4257-1 will meet the IEEE
specification.
In some applications it is necessary to control whether or
not the PD is detected. In this case, the 25k signature can
be enabled and disabled with the use of the SIGDISA pin
(Figure 3). Disabling the signature via the SIGDISA pin will
change the signature resistor to 9k which is an invalid sig-
nature per the IEEE 802.3af specification. This invalid
signature is present for PD input voltages from –2.8V to
–10V. If the input rises above –10V, the signature resis-
tor reverts to 25k to minimize power dissipation in the
LTC4257-1. To disable the signature, tie SIGDISA to GND.
Alternately, the SIGDISA pin can be driven high with re-
spect to V
LTC4257-1 are disabled.
8
IN
. When SIGDISA is high, all functions of the
U
U
W
PSE
TO
Figure 3. 25k Signature Resistor with Disable
4
V
LTC4257-1
25k SIGNATURE
IN
U
RESISTOR
9k
16k
SIGNATURE DISABLE
Classification
Once the PSE has detected a PD, the PSE may optionally
classify the PD. Classification provides a method for more
efficient allocation of power by allowing the PSE to identify
lower-power PDs and allocate less power for these de-
vices. The IEEE 802.3af specification defines five classes
(Table 2) with varying power levels. The designer selects
the appropriate classification based on the power con-
sumption of the PD. For each class, there is an associated
load current that the PD asserts onto the line during
classification probing. The PSE measures the PD load
current to determine the proper classification and PD
power requirements.
Table 2. Summary of IEEE 802.3af Power Classifications and
LTC4257-1 R
CLASS
0
1
2
3
4
*Class 4 is currently reserved and should not be used.
Early revisions of the IEEE 802.3af draft specification
defined two methods that a PSE could use in order to
perform PD classification. These methods are known as
Measured Current and Measured Voltage. The IEEE has
since removed the Measured Voltage method from the
Reserved
Optional
Optional
Optional
USAGE
Default
SIGDISA
CLASS
GND
8
7
42571 F03
Resistor Selection
AT INPUT OF PD
POWER LEVELS
0.44 to 12.95
6.49 to 12.95
0.44 to 3.84
3.84 to 6.49
MAXIMUM
Reserved*
(W)
CLASSIFICATION
LOAD CURRENT
NOMINAL
(mA)
10.5
18.5
< 5
28
40
LTC4257-1
RESISTOR
(Ω, 1%)
R
Open
68.1
45.3
30.9
CLASS
124
42571fb