LTC4257IS8-1 Linear Technology, LTC4257IS8-1 Datasheet - Page 6

IC CONTROLLER POE INTERFAC 8SOIC

LTC4257IS8-1

Manufacturer Part Number
LTC4257IS8-1
Description
IC CONTROLLER POE INTERFAC 8SOIC
Manufacturer
Linear Technology
Type
Power over Ethernet Switch (PoE)r
Datasheet

Specifications of LTC4257IS8-1

Applications
IP Phones, Power over LAN, Network Routers and Switches
Internal Switch(s)
Yes
Current Limit
350mA
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
8-SOIC (0.154", 3.90mm Width)
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
LTC4257IS8-1
Manufacturer:
LT
Quantity:
10 000
Part Number:
LTC4257IS8-1#PBF
Manufacturer:
LINEAR/凌特
Quantity:
20 000
Part Number:
LTC4257IS8-1#TRPBF
Manufacturer:
LINEAR
Quantity:
7 556
APPLICATIO S I FOR ATIO
LTC4257-1
The LTC4257-1 is intended for use as the front end of a
Powered Device (PD) adhering to the IEEE 802.3af standard.
The LTC4257-1 includes a trimmed 25k signature resistor,
classification current source, and an input current limit cir-
cuit. With these functions integrated into the LTC4257-1,
the signature and power interface for a PD that meets all
the requirements of the IEEE 802.3af specification can be
built with a minimum of external components.
The LTC4257-1 has been specifically designed to interface
with legacy PoE PSEs which do not meet the inrush
current requirement of the IEEE 802.3af specification. By
setting the initial inrush current limit to a low level, a PD
using the LTC4257-1 minimizes the current drawn from
the PSE during start-up. After powering up, the LTC4257-1
switches to the high level current limit, thereby allowing
the PD to consume up to 12.95 watts if an 802.3af PSE is
present. This low level current limit also allows the
LTC4257-1 to charge arbitrarily large load capacitors
without exceeding the inrush limits of the IEEE 802.3af
specification. This dual level current limit provides the
system designer with flexibility to design PDs which are
compatible with legacy PSEs while also being able to take
advantage of the higher power allocation available in an
IEEE 802.3af system.
Using an LTC4257-1 for the power and signature inter-
face functions of a PD provides several advantages. The
LTC4257-1 current limit circuit includes an onboard,
100V, 400mA power MOSFET with low leakage. This
onboard low leakage MOSFET avoids the possibility of
corrupting the 25k signature resistor while also saving
board space and cost. In addition, the inrush current limit
requirement of the IEEE 802.3af standard causes large
transient power dissipation in the PD. The LTC4257-1 is
designed to allow multiple turn-on sequences without
overheating the miniature 8-lead package. In the event of
excessive power cycling, the LTC4257-1 provides ther-
mal overload protection to keep the onboard power
MOSFET within its safe operating area.
Operation
The LTC4257-1 has several modes of operation depend-
ing on the applied input voltage as shown in Figure 1 and
6
U
U
W
U
PSE
Figure 1. Output Voltage, PWRGD and PD Current
as a Function of Input Voltage
V
IN
I
CLASS
I
R
LIMIT
CLASS
I
10
20
30
40
50
10
20
30
40
50
10
20
30
40
50
IN
I
I
I
I
I
1
2
CLASS
LIMIT
LOAD
=
=
2
4
V1 – 2 DIODE DROPS
V2 – 2 DIODE DROPS
UVLO
= 140mA (NOMINAL)
=
OFF
DEPENDENT ON R
dV
dt
R
V
R
LTC4257-1
POWER
DETECTION V1
CLASS
IN
V
LOAD
=
BAD
DETECTION V2
IN
DETECTION I
DETECTION I
I
PWRGD
LIMIT
CLASSIFICATION
I
25kΩ
25kΩ
C1
CLASS
CLASSIFICATION
V
GND
OUT
UVLO
TURN-ON
UVLO
POWER
ON
8
6
5
GOOD
2
1
CLASS
R9 R
SELECTION
PWRGD TRACKS
V
CURRENT
LIMIT, I
LOAD, I
UVLO
TURN-OFF
τ = R
IN
POWER
LOAD
UVLO
C1
BAD
OFF
LOAD
TIME
TIME
TIME
LIMIT
LOAD
42571 F01
C1
V
OUT
GND
42571fb

Related parts for LTC4257IS8-1