LTC4257IS8-1 Linear Technology, LTC4257IS8-1 Datasheet - Page 14

• Manufacturer Part Number: LTC4257IS8-1
• Description: IC CONTROLLER POE INTERFAC 8SOIC
• Manufacturer: Linear Technology
• Type: Power over Ethernet Switch (PoE)r

Specifications of LTC4257IS8-1

• Applications: IP Phones, Power over LAN, Network Routers and Switches
• Internal Switch(s): Yes
• Current Limit: 350mA
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 8-SOIC (0.154", 3.90mm Width)
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

APPLICATIO S I FOR ATIO
LTC4257-1
The IEEE standard includes an AC impedance requirement
in order to implement the AC disconnect function. Capaci-
tor C14 in Figure 8 is used to meet this AC impedance
requirement. A 0.1µF capacitor is recommended for this
application.
The LTC4257-1 has several different modes of operation
based on the voltage present between the V
The forward voltage drop of the input diodes in a PD design
subtracts from the input voltage and will affect the transi-
tion point between modes. When using the LTC4257-1, it
is necessary to pay close attention to this forward voltage
drop. Selection of oversized diodes will help keep the PD
thresholds from exceeding IEEE specifications.
The input diode bridge of a PD can consume over 4% of the
available power in some applications. It may be desirable
to use Schottky diodes in order to reduce this power loss.
However, if the standard diode bridge is replaced with a
Schottky bridge, the transition points between modes will
be affected. The application circuit (Figure 11) shows a tech-
nique for using Schottky diodes while maintaining proper
threshold points to meet IEEE 802.3af compliance.
Auxiliary Power Source
In some applications, it may be desirable to power the PD
from an auxiliary power source such as a wall transformer.
The auxiliary power can be injected into the PD at several
locations and various trade-offs exist. Power can be
injected at the 3.3V or 5V output of the isolated power
supply with the use of a diode ORing circuit. This method
accesses the internal circuits of the PD after the isolation
barrier and therefore meets the 802.3af isolation safety
requirements for the wall transformer jack on the PD.
Power can also be injected into the PD interface portion of
the LT4257-1. In this case, it is necessary to ensure the
user cannot access the terminals of the wall transformer
jack on the PD since this would compromise the 802.3af
isolation safety requirements. Figure 9 demonstrates three
methods of diode ORing external power into a PD. Option
1 inserts power before the LTC4257-1 while options 2 and
3 apply power after the LTC4257-1.
If power is inserted before the LTC4257-1 (option 1), it is
necessary for the wall transformer to exceed the LTC4257-1
UVLO turn-on requirement and limit the maximum voltage
14
U
U
W
IN
and GND pins.
U
to 57V. This option provides input current limit for the
transformer, provides a valid power good signal and
simplifies power priority issues. As long as the wall
transformer applies power to the PD before the PSE, it will
take priority and the PSE will not power up the PD because
the wall power will corrupt the 25k signature. If the PSE is
already powering the PD, the wall transformer power will
be in parallel with the PSE. In this case, priority will be
given to the higher supply voltage. If the wall transformer
voltage is higher, the PSE should remove line voltage since
no current will be drawn from the PSE. On the other hand,
if the wall transformer voltage is lower, the PSE will
continue to supply power to the PD and the wall trans-
former power will not be used. Proper operation should
occur in either scenario.
If auxiliary power is applied after the LTC4257-1 (option 2),
a different set of tradeoffs arise. In this configuration, the
wall transformer does not need to exceed the LTC4257-1
turn-on UVLO requirement; however, it is necessary to
include diode D9 to prevent the transformer from applying
power to the LTC4257-1. The transformer voltage require-
ments will be governed by the needs of the PD switcher and
may exceed 57V. However, power priority issues require
more intervention. If the wall transformer voltage is below
the PSE voltage, then priority will be given to the PSE power.
The PD will draw power from the PSE while the transformer
will sit unused. This configuration is not a problem in a PoE
system. On the other hand, if the wall transformer voltage
is higher than the PSE voltage, the PD will draw power from
the transformer. In this situation, it is necessary to address
the issue of power cycling that may occur if a PSE is present.
The PSE will detect the PD and apply power. If the PD is being
powered by the wall transformer, then the PD will not meet
the minimum load requirement and the PSE will subse-
quently remove power. The PSE will again detect the PD and
power cycling will start. With a transformer voltage above
the PSE voltage, it is necessary to either disable the signa-
ture, as shown in option 2, or install a minimum load on the
output of the LTC4257-1 to prevent power cycling.
The third option also applies power after the LTC4257-1,
while omitting diode D9. With the diode omitted, the
transformer voltage is applied to the LTC4257-1 in addi-
tion to the load. For this reason, it is necessary to ensure
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