LTC4257IS8-1 Linear Technology, LTC4257IS8-1 Datasheet - Page 3

• Manufacturer Part Number: LTC4257IS8-1
• Description: IC CONTROLLER POE INTERFAC 8SOIC
• Manufacturer: Linear Technology
• Type: Power over Ethernet Switch (PoE)r

Specifications of LTC4257IS8-1

• Applications: IP Phones, Power over LAN, Network Routers and Switches
• Internal Switch(s): Yes
• Current Limit: 350mA
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 8-SOIC (0.154", 3.90mm Width)
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

ELECTRICAL CHARACTERISTICS
temperature range, otherwise specifications are at T
SYMBOL
V
V
R
V
V
V
I
R
I
I
I
T
Note 1: Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
Note 2: All voltages are with respect to GND pin unless otherwise noted.
Note 3: The LTC4257-1 operates with a negative supply voltage in the
range of –1.5V to –57V. To avoid confusion, voltages in this data sheet are
always referred to in terms of absolute magnitude. Terms such as
“maximum negative voltage” refer to the largest negative voltage and a
“rising negative voltage” refers to a voltage that is becoming more
negative.
Note 4: The LTC4257-1 is designed to work with two polarity protection
diode drops between the PSE and PD. Parameter ranges specified in the
Electrical Characteristics are with respect to LTC4257-1 pins and are
designed to meet IEEE 802.3af specifications when these diode drops are
included. See Applications Information.
Note 5: Signature resistance is measured via the 2-point ∆V/∆I method as
defined by IEEE 802.3af. The LTC4257-1 signature resistance is offset
from 25k to account for diode resistance. With two series diodes, the total
PD resistance will be between 23.75kΩ and 26.25kΩ and meet IEEE
802.3af specifications. The minimum probe voltages measured at the
LTC4257-1 pins are –1.5V and –2.5V. The maximum probe voltages are
–8.5V and –9.5V.
Note 6: The LTC4257-1 includes hysteresis in the UVLO voltages to
preclude any start-up oscillation. Per IEEE 802.3af requirements, the
LTC4257-1 will power up from a voltage source with 20Ω series
resistance on the first trial.
Note 7: I
Pin 2. Total supply current in classification mode will be I
(see Note 8).
PG_LEAK
OUT_LEAK
LIMIT_HIGH
LIMIT_LOW
SHUTDOWN
IH
IL
PG_OUT
PG_THRES_FALL
PG_THRES_RISE
INPUT
ON
IN_CLASS
PARAMETER
Signature Disable
Signature Disable
Signature Disable
Power Good Output Low Voltage
Power Good Trip Point
Power Good Leakage
On-Resistance
V
Input Current Limit, High Level
Input Current Limit, Low Level
Thermal Shutdown Trip Temperature
does not include classification current programmed at
OUT
High Level Input Voltage
Low Level Input Voltage
Input Resistance
Leakage
IN_CLASS
CONDITIONS
With Respect to V
High Level Invalidates Signature (Note 10)
With Respect to V
Low Level Enables Signature
With Respect to V
I = 1mA, V
V
V
I = 350mA, V
(Note 9)
V
V
0°C ≤ T
–40°C ≤ T
V
(Notes 12, 14)
IN
IN
IN
IN
IN
A
V
V
OUT
OUT
= 25°C. (Note 3)
= –48V, Voltage Between V
= 0V, PWRGD FET Off, V
= 0V, Power MOSFET Off, V
= – 48V, V
= – 48V, V
Falling
Rising
+ I
A
The
≤ 70°C
CLASS
A
IN
≤ 85°C
= – 48V, PWRGD Referenced to V
IN
●
OUT
OUT
= – 48V, Measured from V
denotes the specifications which apply over the full operating
IN
IN
IN
= –43V (Notes 12, 13)
= –43V (Notes 12, 13)
,
,
Note 8: I
∆I
I
include variations in R
a PD also includes the IC quiescent current (I
Information.
Note 9: For the DD package, this parameter is assured by design and
wafer level testing.
Note 10: To disable the 25k signature, tie SIGDISA to GND (±0.1V) or hold
SIGDISA high with respect to V
Note 11: I
good status circuit. This current is compensated for in the 25kΩ signature
resistance and does not affect PD operation.
Note 12: The LTC4257-1 includes thermal protection. In the event of an
overtemperature condition, the LTC4257-1 will turn off the power MOSFET
until the part cools below the overtemperature limit. The LTC4257-1 is
also protected against thermal damage from incorrect classification
probing by the PSE. If the LTC4257-1 exceeds the overtemperature trip
point, the classification load current is disabled.
Note 13: The LTC4257-1 includes dual level input current limit. At turn-on,
before C1 is charged, the LTC4257-1 current level is set to the low level.
After C1 is charged and the V
power good threshold, the LTC4257-1 switches to high level current limit.
The LTC4257-1 stays in high level current limit until the input voltage
drops below the UVLO turn-off threshold.
Note 14: This IC includes overtemperature protection that is intended to
protect the device during momentary overload conditions. Junction
temperature will exceed 125°C when overtemperature protection is active.
Continuous operation above the specified maximum operating junction
temperature may impair device reliability.
CLASS
CLASS
= 1.237/R
PWRGD
accuracy is with respect to the ideal current defined as
CLASS
IN
OUT_LEAK
OUT
and V
= 57V
= 57V (Note 11)
is the measured current flowing through R
CLASS
OUT
includes current drawn at the V
IN
(Note 9)
. The current accuracy specification does not
CLASS
to V
IN
OUT
resistance. The total classification current for
OUT
IN
. See Applications Information.
– V
●
●
●
●
●
●
●
●
●
●
●
●
IN
voltage difference is below the
MIN
100
350
340
100
1.3
2.7
3
IN_CLASS
LTC4257-1
TYP
375
375
140
140
1.5
3.0
1.0
OUT
). See Applications
pin by the power
CLASS
MAX
0.45
150
400
400
180
0.5
1.7
3.3
1.6
2.0
57
1
.
UNITS
42571fb
3
mA
mA
mA
kΩ
µA
µA
°C
Ω
Ω
V
V
V
V
V