NCP5304DR2G ON Semiconductor, NCP5304DR2G Datasheet - Page 14

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NCP5304DR2G

Manufacturer Part Number
NCP5304DR2G
Description
IC DRIVER HI/LOW SIDE HV 8-SOIC
Manufacturer
ON Semiconductor
Type
High Side/Low Sider
Datasheet

Specifications of NCP5304DR2G

Configuration
Half Bridge
Input Type
Non-Inverting
Delay Time
100ns
Current - Peak
250mA
Number Of Configurations
1
Number Of Outputs
2
High Side Voltage - Max (bootstrap)
600V
Voltage - Supply
10 V ~ 20 V
Operating Temperature
-40°C ~ 125°C
Mounting Type
Surface Mount
Package / Case
8-SOIC (3.9mm Width)
Rise Time
160 ns
Fall Time
75 ns
Supply Voltage (min)
10 V
Supply Current
5 mA
Maximum Operating Temperature
+ 150 C
Mounting Style
SMD/SMT
Bridge Type
Full Bridge, Half Bridge
Number Of Drivers
2
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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Negative Voltage Safe Operating Area
is possible to see negative voltage appearing on the bridge
pin (pin 6) during the power MOSFETs transitions. When
the high−side MOSFET is switched off, the body diode of
the low−side MOSFET starts to conduct. The negative
voltage applied to the bridge pin thus corresponds to the
forward voltage of the body diode. However, as pcb copper
tracks and wire bonding introduce stray elements
(inductance and capacitor), the maximum negative voltage
of the bridge pin will combine the forward voltage and the
oscillations created by the parasitic elements. As any
CMOS device, the deep negative voltage of a selected pin
can inject carriers into the substrate, leading to an erratic
behavior of the concerned component. ON Semiconductor
provides characterization data of its half−bridge driver to
show the maximum negative voltage the driver can safely
operate with. To prevent the negative injection, it is the
designer duty to verify that the amount of negative voltage
pertinent to his/her application does not exceed the
characterization curve we provide, including some safety
margin.
accepted by the driver, this parameter has been
characterized over full the temperature range of the
component. A test fixture has been developed in which we
purposely negatively bias the bridge pin during the
freewheel period of a buck converter. When the upper gate
voltage shows signs of an erratic behavior, we consider the
limit has been reached.
area. Its interpretation is as follows: assume a negative
10 V pulse featuring a 100 ns width is applied on the bridge
pin, the driver will work correctly over the whole die
temperature range. Should the pulse swing to −20 V,
keeping the same width of 100 ns, the driver will not work
properly or will be damaged for temperatures below
125°C.
When the driver is used in a half bridge configuration, it
In order to estimate the maximum negative voltage
Figure 48, illustrates the negative voltage safe operating
APPLICATION INFORMATION
http://onsemi.com
14
Summary:
voltage and width level where the driver starts to fail at the
corresponding die temperature.
operating limit, it is possible to limit the negative voltage
to the bridge pin by inserting one resistor and one diode as
follows:
IN_LO
driver. D1 should be connected directly between the bridge
pin (pin 6) and the ground pin (pin 4). By this way the
negative voltage applied to the bridge pin will be limited
by D1 and R1 and will prevent any wrong behavior.
IN_Hi
Figure 49. R1 and D1 Improves the Robustness of the
Note, each curve of the Figure 48 represents the negative
If in the application the bridge pin is too close of the safe
R1 and D1 should be placed as close as possible of the
If the negative pulse characteristic (negative voltage
level & pulse width) is above the curves the driver
runs in safe operating area.
If the negative pulse characteristic (negative voltage
level and pulse width) is below one or all curves the
driver will NOT run in safe operating area.
0
Vcc
1
2
3
4
IN_LO
IN_HI
VCC
GND
U2
NCP5304
DRV_LO
BRIDGE
DRV_HI
D4
MUR160
Driver
BOOT
D3
MUR160
8
7
6
5
R2
10R
C2
100n
Vbulk
0
M3
M4

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