MAX8662ETM+ Maxim Integrated Products, MAX8662ETM+ Datasheet - Page 20

• Manufacturer Part Number: MAX8662ETM+
• Description: IC POWER MANAGE 48-TQFN-EP
• Manufacturer: Maxim Integrated Products

Specifications of MAX8662ETM+

• Applications: Handheld/Mobile Devices
• Current - Supply: 900µA
• Voltage - Supply: 4.1 V ~ 8 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 48-TQFN Exposed Pad
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Power-Management ICs for
Single-Cell, Li+ Battery-Operated Devices
20
MAX8662
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40
41
42
43
44
45
46
47
48
—
PIN
MAX8663
33
34
35
36
37
38
39
40
—
—
NAME
OUT6
OUT7
PSET
IN67
POK
PG3
SL1
SL2
VL
EP
Power Ground for Boost Regulator 3. GND, PG1, PG2, and PG3 must be connected
together externally.
Linear Regulator 6 Output. Delivers up to 300mA at an output voltage determined by SL1
and SL2. Connect a 2.2μF ceramic capacitor from OUT6 to GND. Increase the value to
4.7μF if V
Input Supply for Linear Regulators 6 and 7. Connect IN67 to a supply voltage of 1.7V to
V
Linear Regulator 7 Output. Delivers up to 150mA at an output voltage determined by SL1
and SL2. Connect a 1μF ceramic capacitor from OUT7 to GND. Increase the value to 2.2μF
if V
Input Limiter and Charger Logic Supply. Provides 3.3V when a valid input voltage is
present at DC. Connect a 0.1μF capacitor from VL to GND. VL is capable of providing up to
10mA to an external load when DC is valid.
Output-Voltage Select Inputs 1 and 2 for Linear Regulators. Leave disconnected, or
connect to GND or SYS to set to one of three states. SL1 and SL2 set the output voltage of
OUT4, OUT5, OUT6, and OUT7 to one of nine combinations. See Table 3.
Input Current-Limit Set Input. Connect a resistor (R
the DC input current limit from 500mA to 2A.
Power-Ok Output. POK is an open-drain nMOS output that pulls low when a valid input is
detected at DC. This output is not affected by the states of PEN1, PEN2, or CEN.
Exposed Paddle. Connect the exposed paddle to ground. Connecting the exposed paddle
to ground does not remove the requirement for proper ground connections to GND, PG1,
PG2, and PG3. The exposed paddle is attached with epoxy to the substrate of the die,
making it an excellent path to remove heat from the IC.
SYS
OUT7
. Connect at least a 1μF ceramic capacitor from IN67 to GND.
< 1.5V.
OUT6
< 1.5V.
FUNCTION
Pin Description (continued)
PSET
) from PSET to ground to program