SE95D,118 NXP Semiconductors, SE95D,118 Datasheet - Page 5
![IC SENSOR TEMP 2.8-5.5V SOT96-1](/photos/5/44/54425/568-8-soic_sot96-1_sml.jpg)
SE95D,118
Manufacturer Part Number
SE95D,118
Description
IC SENSOR TEMP 2.8-5.5V SOT96-1
Manufacturer
NXP Semiconductors
Datasheet
1.SE95DP118.pdf
(27 pages)
Specifications of SE95D,118
Package / Case
8-SOIC (3.9mm Width)
Output Type
I²C™
Function
Temp Sensor, Watchdog
Topology
ADC (Sigma Delta), Comparator, Register Bank
Sensor Type
Internal
Sensing Temperature
-55°C ~ 125°C
Output Alarm
No
Output Fan
Yes
Voltage - Supply
2.8 V ~ 5.5 V
Operating Temperature
-55°C ~ 125°C
Mounting Type
Surface Mount
Full Temp Accuracy
+/- 3 C
Digital Output - Bus Interface
Serial (2-Wire, I2C)
Digital Output - Number Of Bits
13 bit
Maximum Operating Temperature
+ 125 C
Minimum Operating Temperature
- 55 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Other names
935274141118
SE95D-T
SE95D-T
SE95D-T
SE95D-T
NXP Semiconductors
SE95_7
Product data sheet
In OS interrupt mode, the OS output is used for thermal interruption. When the device is
powered-up, the OS output is first activated only when Temp exceeds T
active indefinitely until being reset by a read of any register. Once the OS output has been
activated by crossing T
below T
register. The OS interrupt operation would be continued in this sequence: T
T
mode also resets the OS output.
In both cases, comparator mode and interrupt mode, the OS output is activated only if a
number of consecutive faults, defined by the device fault queue, has been met. The fault
queue is programmable and stored in bits OS_F_QUE[1:0], of register Conf. Also, the OS
output active state is selectable as HIGH or LOW by setting accordingly the bit OS_POL
of register Conf.
At power-up, the device is put into normal operation mode, register Tos is set to 80 C,
register Thyst is set to 75 C, OS active state is selected LOW and the fault queue is equal
to 1. The data reading of register Temp is not available until the first conversion is
completed in about 33 ms.
The OS response to the temperature is illustrated in
Fig 4.
hyst
trip, reset, T
(1) OS is reset by either reading register or putting the device in shutdown mode. Assumed that the
hyst
OS ACTIVE
OS ACTIVE
OS RESET
OS RESET
fault queue is met at each T
OS response to temperature
; then again, it remains active indefinitely until being reset by a read of any
T
T
hyst
Ultra high accuracy digital temperature sensor and thermal watchdog
os
os
trip, reset, T
Rev. 07 — 2 September 2009
os
and then reset, it can be activated again only when Temp drops
hyst
os
and T
(1)
trip, reset, and etc. Putting the device into shutdown
OS output in comparator mode
hyst
OS output in interrupt mode
reading temperature limits
crossing point.
Figure
(1)
4.
© NXP B.V. 2009. All rights reserved.
os
; then it remains
001aad623
os
trip, reset,
SE95
(1)
5 of 27