ISL9502CRZ Intersil, ISL9502CRZ Datasheet - Page 22

IC CTRLR PWM 2PHASE GPU 48-QFN

ISL9502CRZ

Manufacturer Part Number
ISL9502CRZ
Description
IC CTRLR PWM 2PHASE GPU 48-QFN
Manufacturer
Intersil
Datasheet

Specifications of ISL9502CRZ

Pwm Type
Controller
Number Of Outputs
1
Frequency - Max
500kHz
Voltage - Supply
4.75 V ~ 5.25 V
Buck
Yes
Boost
No
Flyback
No
Inverting
No
Doubler
No
Divider
No
Cuk
No
Isolated
No
Operating Temperature
-10°C ~ 100°C
Package / Case
48-VQFN
Frequency-max
500kHz
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Duty Cycle
-
The ISL9502 uses RC filter to sense the average voltage on
phase node and forces the average voltage on the phase node
to be equal for current balance. Even though the ISL9502
forces the ISEN voltages to be almost equal, the inductor
currents will not be exactly equal. Take DCR current sensing as
example, two errors have to be added to find the total current
imbalance. 1) Mismatch of DCR: If the DCR has a 5%
tolerance, then the resistors could mismatch by 10% worst
case. If each phase is carrying 20A then the phase currents
mismatch by 20A*10% = 2A. 2) Mismatch of phase
voltages/offset voltage of ISEN pins. The phase voltages are
within 2mV of each other by current balance circuit. The error
current that results is given by 2mV/DCR. If DCR = 1mΩ then
the error is 2A.
In the above example, the two errors add to 4A. For the two
phase DC/DC, the currents would be 22A in one phase and
18A in the other phase. In the above analysis, the current
balance can be calculated with 2A/20A = 10%. This is the
worst case calculation, for example, the actual tolerance of
two 10% DCRs is 10%*sqrt(2) = 7%.
There are provisions to correct the current imbalance due to
layout or to purposely divert current to certain phase for better
thermal management. A customer can put a resistor in parallel
with the current sensing capacitor on the phase of interest in
order to purposely increase the current in that phase.
In the case the pc board trace resistance from the inductor to
the microprocessor are not the same on two phases, the
current will not be balanced. On the phase that have too
much trace resistance a resistor can be added in parallel
with the ISEN capacitor that will correct for the poor layout.
An estimate of the value of the resistor is:
Rtweak = Risen * Rdcr/(Rtrace-Rmin)
where Risen is the resistance from the phase node to the
ISEN pin; usually 10kΩ. Rdcr is the DCR resistance of the
inductor. Rtrace is the trace resistance from the inductor to
the microprocessor on the phase that needs to be tweaked.
It should be measured with a good microOhm meter. Rmin is
the trace resistance from the inductor to the microprocessor
on the phase with the least resistance.
For example, if the pc board trace on one phase is 0.5mΩ
and on another trace is 0.3mΩ; and if the DCR is 1.2mΩ;
then the tweaking resistor is
Rtweak = 10kΩ * 1.2/(0.5 - 0.3) = 60kΩ.
When choosing current sense resistor, not only the tolerance of
the resistance is important, but also the TCR. And its combined
tolerance at a wide temperature range should be calculated.
Droop Using Discrete Resistor Sensing - Static/
Dynamic Mode of Operation
Figure 28 shows the equivalent circuit of a discrete current
sense approach. Figure 20 shows a more detailed schematic
22
ISL9502
of this approach. Droop is solved the same way as the DCR
sensing approach with a few slight modifications.
First, there is no NTC required for thermal compensation,
therefore, the Rn resistor network in the previous section is
not required. Secondly, there is no time constant matching
required, therefore, the Cn component is not matched to the
L/DCR time constant. This component does indeed provide
noise immunity and therefore is populated with a 39pF
capacitor.
The RS values in the previous section, RS = 1.5k_1% are
sufficient for this approach.
Now, the input to the droop amplifier is essentially the Vrsense
voltage. This voltage is given by the following equation:
The gain of the droop amplifier, K
for the ratio of the R
use the following equation:
Solving for the R
previous NTC example, R
we obtain the following:
These values are extremely sensitive to layout. Once the board
has been laid out, some tweaking may be required to adjust the
full load droop. This is fairly easy and can be accomplished by
allowing the system to achieve thermal equilibrium at full load,
and then adjusting R
Fault Protection - Overcurrent Fault Setting
As previously described, the overcurrent protection of the
ISL9502 is related to the droop voltage. Previously we have
calculated that the droop voltage = ILoad * Rdroop, for an
Rdroop that produces a load line slope of 0.0018 (V/A).
Knowing this relationship, the overcurrent protection
threshold can be set up as a voltage droop level. Knowing
this voltage droop level, one can program in the appropriate
drop across the Roc resistor. This voltage drop will be
referred to as Voc. Once the droop voltage is greater than
Voc, the PWM drives will turn off and PGOOD will go low.
The selection of Roc is given in equation. Assuming we
desire an overcurrent trip level, Ioc, of 60A, and knowing that
the load line slope, Rdroop is 0.0018 (V/A), we can then
calculate for Roc as shown in equation.
Vrsense
K
Rdrp2
R
droopamp
OC
=
=
I
---------------------------------- -
OC
EQV
(
K
10µA
=
droopamp
R
=
------------------- - 2
R
R
droop
sense
droop
R
------------------- - I
drp2
sense
2
drp2
sense
=
value, Rdroop = 0.0018(V/A) from the
1
60 0.0018
------------------------------
) R
10 10
to obtain the desired droop value.
OUT
sense
to droop impedance, Rdroop. We
drp1
6
= 0.001Ω and R
=
droopamp
2.6kΩ
=
10.8kΩ
, must be adjusted
drp1
July 17, 2006
(EQ. 26)
(EQ. 27)
(EQ. 28)
(EQ. 29)
= 1kΩ,
FN9275.1

Related parts for ISL9502CRZ