ISL6244CR Intersil, ISL6244CR Datasheet - Page 7

• Manufacturer Part Number: ISL6244CR
• Description: IC CTRLR PWM 2-4-PHASE 32-QFN
• Manufacturer: Intersil

Specifications of ISL6244CR

• Pwm Type: Voltage/Current Mode
• Number Of Outputs: 4
• Frequency - Max: 4MHz
• Duty Cycle: 75%
• Voltage - Supply: 4.75 V ~ 5.25 V
• Buck: Yes
• Boost: No
• Flyback: No
• Inverting: No
• Doubler: No
• Divider: No
• Cuk: No
• Isolated: No
• Operating Temperature: 0°C ~ 70°C
• Package / Case: 32-VQFN Exposed Pad, 32-HVQFN, 32-SQFN, 32-DHVQFN
• Frequency-max: 4MHz
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

Functional Pin Description
GND
Bias and reference ground for the IC.
VFF
This pin is connected to VIN through a 10:1 voltage divider to
allow for battery “feed-forward,” which improves stability over
varying input line.
VID4, VID3, VID2, VID1, VID0
The state of these five inputs program the internal DAC,
which provides the reference voltage for output regulation.
Connect these pins to either open-drain or active pull-up
type outputs. Pulling these pins above 2.9V can cause a
reference offset inaccuracy.
OFS
Connecting a resistor between this pin and ground creates a
positive offset voltage which is added to the DAC voltage,
allowing easy implementation of load-line regulation. For no
offset, simply tie this pin to ground.
FB and COMP
The internal error amplifier inverting input and output
respectively. Connect the external R-C feedback
compensation network of the regulator to these pins.
COMP
VID2
VID1
VID0
OFS
NC
NC
FB
1
2
3
4
5
6
7
8
32
9
10
31
NC = NO CONNECT
(32 LEAD QFN 5x5)
11
30
TOP VIEW
ISL6244CR
12
29
7
13
28
14
27
15
26
16
25
24
23
22
21
20
19
18
17
PWM4
ISEN4
ISEN1
PWM1
PWM2
GND
ISEN2
ISEN3
ISL6244
IOUT
The current carried out of this pin is proportional to output
current and can be used to incorporate output voltage droop
and/or load sharing. The scale factor is set by the ratio of the
ISEN resistors and the lower MOSFET r
desired, connect this pin to FB. When not used for droop or
load sharing, simply leave this pin open.
VSEN, RGND, VDIFF
VSEN and RGND are the inputs to the differential remote-
sense amplifier. Connect these pins to the sense points of
the remote load. Connect an appropriately sized feedback
resistor, R
VCC
Supplies all the power necessary to operate the chip. The IC
starts to operate when the voltage on this pin exceeds the
rising POR threshold and shuts down when the voltage on
this pin drops below the falling POR threshold. Connect this
pin directly to a +5V supply.
ISEN1, ISEN2, ISEN3, ISEN4
Current sense inputs. A resistor connected between these
pins and their respective phase node sets a current
proportional to the current in the lower MOSFET during it’s
conduction interval. This current is used as a reference for
channel balancing, load sharing, protection, and load-line
regulation. Inactive channels should have their respective
sense inputs left open.
PWM1, PWM2, PWM3, PWM4
Pulse-width modulating outputs. Connect these pins to the
individual ISL620X driver PWM input pins. These logic
outputs command the driver IC(s) in switching the half-
bridge configuration of MOSFETs. The number of active
channels is determined by the state of PWM3 and PWM4. If
PWM3 is tied to VCC, this indicates to the controller that two
channel operation is desired. In this case, PWM 4 should be
left open or tied to VCC. Shorting PWM4 to VCC indicates
that three channel operation is desired.
PGOOD
Power good is an open-drain logic output that changes to a
logic low when the voltage at VDIFF is 350mV below the VID
setting (under-voltage) or above 2.2V (over-voltage).
FS
A pin for setting the switching frequency of the regulator.
Place a resistor from this pin to ground to set the switching
frequency between 80kHz and 1MHz.
EN
This pin enables the ISL6244 regulator.
FB
, between VDIFF and FB.
DS(ON)
December 28, 2004
. If droop is
FN9106.3