MAX17582GTM+ Maxim Integrated Products, MAX17582GTM+ Datasheet - Page 21

• Manufacturer Part Number: MAX17582GTM+
• Description: IC PWM CTRLR STP-DN DL 48TQFN
• Manufacturer: Maxim Integrated Products
• Series: Quick-PWM™r

Specifications of MAX17582GTM+

• Applications: Controller, Intel IMVP-6.5™
• Voltage - Input: 4.5 ~ 5.5 V
• Number Of Outputs: 1
• Voltage - Output: 0.01 ~ 1.5 V
• Operating Temperature: -40°C ~ 105°C
• Mounting Type: Surface Mount
• Package / Case: 48-TQFN Exposed Pad
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

CCI and FB. The resulting compensation current and
voltage are determined by the following equations:
where Z
secondary on-time one-shot uses this integrated signal
(V
time. When the main and secondary current-sense sig-
nals (V
become unbalanced, the transconductance amplifiers
adjust the secondary on-time, which increases or
decreases the secondary inductor current until the cur-
rent-sense signals are properly balanced:
This algorithm results in a nearly constant switching fre-
quency and balanced inductor currents despite the
lack of a fixed-frequency clock generator. The benefits
of a constant switching frequency are twofold: first, the
frequency can be selected to avoid noise-sensitive
regions such as the 455kHz IF band; second, the
inductor ripple-current operating point remains relative-
ly constant, resulting in easy design methodology and
predictable output-voltage ripple. The on-time one-
shots have good accuracy at the operating points
specified in the Electrical Characteristics table. On-
times at operating points far removed from the condi-
tions specified in the Electrical Characteristics table
can vary over a wider range.
On-times translate only roughly to switching frequen-
cies. The on-times guaranteed in the Electrical
Characteristics table are influenced by switching
delays in the external high-side MOSFET. Resistive
losses, including the inductor, both MOSFETs, output
capacitor ESR, and PCB copper losses in the output
and ground tend to raise the switching frequency at
higher output currents. Also, the dead-time effect
increases the effective on-time, reducing the switching
frequency. It occurs only during forced-PWM operation
and dynamic output-voltage transitions when the induc-
tor current reverses at light- or negative-load currents.
With reversed inductor current, the inductor’s EMF
CCI
t
ON SEC
I
CCI
(
) to set the secondary high-side MOSFETs on-
CM
)
= G
CCI
=
=
= Main On-t t ime
= V
T
T
(
SW
SW
m
is the impedance at the CCI output. The
(V
CSP1
⎛
⎝ ⎜
⎛
⎝ ⎜
V
V
CSP1
CCI
FB
V
CCI
______________________________________________________________________________________
+
V
+
V
- V
0 07 7 5V
IN
IN
0 075
.
)
- V
.
= V
+
CSN1
(
CSN1
Secondary Current Balance Correctio
Dual-Phase, Quick-PWM Controller for
V
FB
⎞
⎠ ⎟
⎞
⎠ ⎟
+
+ I
T
and V
SW
) - G
IMVP-6.5 CPU Core Power Supplies
CCI
⎛
⎝ ⎜
I
CCI CCI
m
Z
CS
V
(V
Z
CCI
IN
CSP2
= V
⎞
⎠ ⎟
CSP2
- V
CSN2
- V
CSN2
)
n n
)
)
causes LX_ to go high earlier than normal, extending
the on-time by a period equal to the DH_-rising dead
time. For loads above the critical conduction point,
where the dead-time effect is no longer a factor, the
actual switching frequency (per phase) is:
where V
the inductor discharge path, including synchronous recti-
fier, inductor, and PCB resistances; V
the parasitic voltage drops in the inductor charge path,
including high-side switch, inductor, and PCB resis-
tances; and t
The output current of each phase is sensed. Low-offset
amplifiers are used for current balance, voltage-posi-
tioning gain, and current limit. Sensing the current at
the output of each phase offers advantages, including
less noise sensitivity, more accurate current sharing
between phases, and the flexibility of using either a cur-
rent-sense resistor or the DC resistance of the output
inductor.
Using the DC resistance (R
allows higher efficiency. In this configuration, the initial
tolerance and temperature coefficient of the inductor’s
DCR must be accounted for in the output-voltage
droop-error budget and power monitor. This current-
sense method uses an RC filtering network to extract
the current information from the output inductor (see
Figure 3). The resistive divider used should provide a
current-sense resistance (R
current-limit requirements, and the time constant of the
RC network should match the inductor’s time constant
(L/R
and:
where R
R
DCR
CS
is the inductor’s series DC resistance.
):
DROP1
CS
f
is the required current-sense resistance and
SW
ON
is the sum of the parasitic voltage drops in
=
is the on-time as determined above.
R
R
t
ON
CS
CS
(
=
V
=
(
IN
⎛
⎝ ⎜
V
C
R
OUT
L
EQ
+
1
R
+
V
CS
DCR
2
DROP
R
⎡
⎢
⎣
+
R
2
1
) low enough to meet the
1
V
⎞
⎠ ⎟
DROP
) of the output inductor
+
R
1
DCR
R
-
1
2
V
DROP2
DROP
1
Current Sense
⎤
⎥
⎦
)
2
is the sum of
)
21