MAX17582GTM+ Maxim Integrated Products, MAX17582GTM+ Datasheet - Page 39

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MAX17582GTM+

Manufacturer Part Number
MAX17582GTM+
Description
IC PWM CTRLR STP-DN DL 48TQFN
Manufacturer
Maxim Integrated Products
Series
Quick-PWM™r
Datasheet

Specifications of MAX17582GTM+

Applications
Controller, Intel IMVP-6.5™
Voltage - Input
4.5 ~ 5.5 V
Number Of Outputs
1
Voltage - Output
0.01 ~ 1.5 V
Operating Temperature
-40°C ~ 105°C
Mounting Type
Surface Mount
Package / Case
48-TQFN Exposed Pad
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Choose a low-side MOSFET that has the lowest possible
on-resistance (R
package (i.e., one or two 8-pin SOs, DPAK, or D
and is reasonably priced. Make sure that the DL_ gate
driver can supply sufficient current to support the gate
charge and the current injected into the parasitic gate-
to-drain capacitor caused by the high-side MOSFET
turning on; otherwise, cross-conduction problems might
occur (see the MOSFET Gate Drivers section).
Worst-case conduction losses occur at the duty factor
extremes. For the high-side MOSFET (N
case power dissipation due to resistance occurs at the
minimum input voltage:
where η
Generally, a small high-side MOSFET is desired to
reduce switching losses at high input voltages.
However, the R
power dissipation often limits how small the MOSFET
can be. Again, the optimum occurs when the switching
losses equal the conduction (R
side switching losses do not usually become an issue
until the input is greater than approximately 15V.
Calculating the power dissipation in high-side MOSFET
(N
allow for difficult quantifying factors that influence the
turn-on and turn-off times. These factors include the
internal gate resistance, gate charge, threshold volt-
age, source inductance, and PCB layout characteris-
tics. The following switching-loss calculation provides
only a very rough estimate and is no substitute for
breadboard evaluation, preferably including verification
using a thermocouple mounted on N
where C
Q
MOSFET, and I
current (2.2A typ).
Switching losses in the high-side MOSFET can become
an insidious heat problem when maximum AC adapter
voltages are applied due to the squared term in the C x
V
IN
G(SW)
PD N Switching
H
2
PD N
) due to switching losses is difficult since it must
x ƒ
(
(
H
TOTAL
OSS
SW
H
is the charge needed to turn on the N
Re
switching-loss equation. If the high-side
is the N
sistive
is the total number of phases.
GATE
DS(ON)
DS(ON)
______________________________________________________________________________________
)
) =
+
=
MOSFET Power Dissipation
is the peak gate-drive source/sink
C
H
⎝ ⎝
OSS IN SW
⎝ ⎜
required to stay within package
V
MOSFET’s output capacitance,
), comes in a moderate-sized
IN MAX LOAD SW
V
Dual-Phase, Quick-PWM Controller for
OUT
V
(
IN
V
2
η
TOTAL
2
⎠ ⎟ η
)
IMVP-6.5 CPU Core Power Supplies
f
I
⎝ ⎜
DS(ON)
I
LOAD
TOTA
H
f
:
L L
) losses. High-
⎠ ⎟
H
2
), the worst-
R
Q
I
DS ON
GATE
G SW
(
(
2
)
PAK),
)
H
MOSFET chosen for adequate R
voltages becomes extraordinarily hot when biased from
V
lower parasitic capacitance.
For the low-side MOSFET (N
dissipation always occurs at maximum input voltage:
The worst case for MOSFET power dissipation occurs
under heavy overloads that are greater than
I
the current limit and cause the fault latch to trip. To pro-
tect against this possibility, you can over design the cir-
cuit to tolerate:
where I
allowed by the current-limit circuit, including threshold
tolerance and on-resistance variation. The MOSFETs
must have a good-size heatsink to handle the overload
power dissipation.
Choose a Schottky diode (D
low enough to prevent the low-side MOSFET body
diode from turning on during the dead time. Select a
diode that can handle the load current per phase dur-
ing the dead times. This diode is optional and can be
removed if efficiency is not critical.
The boost capacitors (C
enough to handle the gate-charging requirements of
the high-side MOSFETs. Typically, 0.1μF ceramic
capacitors work well for low-power applications driving
medium-sized MOSFETs. However, high-current appli-
cations driving large, high-side MOSFETs require boost
capacitors larger than 0.1μF. For these applications,
select the boost capacitors to avoid discharging the
capacitor more than 200mV while charging the high-
side MOSFETs’ gates:
where N is the number of high-side MOSFETs used for
one regulator, and Q
in the MOSFET’s data sheet. For example, assume (2)
IRF7811W n-channel MOSFETs are used on the high
LOAD(MAX)
PD N
IN(MAX)
(
I
L
LOAD
VALLEY(MAX)
Re
, consider choosing another MOSFET with
sistive
, but are not quite high enough to exceed
=
=
η
η
TOTAL VALLEY MAX
TOTAL VALLEY MAX
)
C
=
BST
⎢1-
⎢ ⎢
GATE
I
⎝ ⎜
is the maximum valley current
_
I
V
=
BST_
IN MAX
V
N Q
is the gate charge specified
OUT
(
×
200
(
L
L
) must be selected large
(
) with a forward voltage
), the worst-case power
GATE
)
mV
Boost Capacitors
)
DS(ON)
+
)
⎝ ⎜
+
η
I
I
LOAD
LOAD MAX
TOTAL
Δ
I
INDUCTOR
at low-battery
(
2
2
⎠ ⎟
2
R
)
DS ON
L L IR
⎠ ⎟
(
39
)

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