MAX17582GTM+ Maxim Integrated Products, MAX17582GTM+ Datasheet - Page 4

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MAX17582GTM+

Manufacturer Part Number
MAX17582GTM+
Description
IC PWM CTRLR STP-DN DL 48TQFN
Manufacturer
Maxim Integrated Products
Series
Quick-PWM™r
Datasheet

Specifications of MAX17582GTM+

Applications
Controller, Intel IMVP-6.5™
Voltage - Input
4.5 ~ 5.5 V
Number Of Outputs
1
Voltage - Output
0.01 ~ 1.5 V
Operating Temperature
-40°C ~ 105°C
Mounting Type
Surface Mount
Package / Case
48-TQFN Exposed Pad
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Dual-Phase, Quick-PWM Controller for
IMVP-6.5 CPU Core Power Supplies
ELECTRICAL CHARACTERISTICS (continued)
(Circuit of Figure 1, V
= V
to +85°C, unless otherwise noted. Typical values are at T
4
FAULT PROTECTION
Output Undervoltage-
Protection Threshold
Output Undervoltage-
Propagation Delay
Boot Time Period
PWRGD Startup Delay
Threshold
PHASEGD Delay
PHASEGD Transition
Blanking Time
(VID Transitions)
PHASEGD Transition
Blanking Time (Phase 2
Enable Transitions)
Voltage
PWRGD, PHASEGD Output
Low Voltage
PWRGD, PHASEGD
Leakage Current
CSN1 Pulldown Resistance
in Shutdown
V
(UVLO) Threshold
CC
CSN1
_______________________________________________________________________________________
Undervoltage Lockout
PARAMETER
, PWRGD, and
Output Low Voltage
Output High
Startup Delay and
and PWRGD
and PWRGD Delay
= V
CSP2
= V
IN
CSN1
= 10V, V
= 1.0000V, FB = FBAC, R
V
SYMBOL
CC
UVLO(VCC)
t
t
BLANK
V
BOOT
t
UVP
= V
UVP
DD
= V
Measured at FB with respect to the voltage target
set by the VID code; see Table 4
FB forced 25mV below trip threshold
Measured from the time when FB reaches the
boot target voltage (Note 2)
Measured at startup from the time when
goes low
Measured at FB with respect
to the voltage target set by
the VID code; see Table 4,
20mV hysteresis (typ)
FB forced 25mV outside the PWRGD trip
thresholds
V
Measured from the time when FB reaches the
target voltage (Note 2)
Number of DH2 pulses for which PHASEGD is
blanked after phase 2 is enabled
Low state, I
High state, I
Low state, I
High-impedance state, PWRGD, PHASEGD forced
to 5V, T
completed (DL_ = low)
Rising edge, 65mV typical hysteresis,
controller disabled below this level
SHDN
(CCI,FB)
= 0, measured after soft-shutdown
= V
A
FBAC
forced 25mV outside trip thresholds
= +25°C
PGDIN
A
SINK
SINK
SOURCE
= 3.57kΩ from FBAC to CSN1, D6–D0 = [0101000]; V
= +25°C.)
= 3mA
= 3mA
= V
CONDITIONS
PSI
= 3mA
= V
ILIM
= 5V, V3P3 = 3.3V, DPRSLPVR = GNDS = GND, V
Lower threshold,
falling edge
(undervoltage)
Upper threshold,
rising edge
(overvoltage)
V3P3 -
+150
MIN
-450
-350
4.05
0.4
20
3
+200
-400
-300
TYP
4.27
6.5
10
60
10
10
20
32
10
SLOW
+250
MAX
-350
-250
4.48
100
0.4
0.4
10
= 5V; T
1
Pulses
UNITS
A
mV
ms
mV
μA
μs
μs
μs
μs
μs
= 0°C
V
V
V
V
CSP1

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