L6701TR STMicroelectronics, L6701TR Datasheet - Page 36

• Manufacturer Part Number: L6701TR
• Description: IC CTRLR 3PH VR10/9/K8 PWRSSO-36
• Manufacturer: STMicroelectronics

Specifications of L6701TR

• Applications: Controller, Intel VR9, VR10, K8
• Voltage - Input: 12V
• Number Of Outputs: 3
• Voltage - Output: 0.8 ~ 1.85 V
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 36-PowerSOIC
• Output Voltage: 0.8 V to 1.85 V
• Output Current: 1.5 A
• Switching Frequency: 110 KHz
• Mounting Style: SMD/SMT
• Maximum Operating Temperature: + 125 C
• Minimum Operating Temperature: 0 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 497-6108-2

15 System Control Loop Compensation
36/44
Removing the dependence from the Error Amplifier gain, so assuming this gain high enough,
and with further simplifications, the control loop gain results:
The system Control Loop gain (See
minimize static error and to cross the 0dB axes with a constant -20dB/dec slope with the
desired crossover frequency ω
zero and two poles; both the poles are fixed once the output filter is designed (LC filter
resonance ω
Figure 18. Equivalent Control Loop Block Diagram (left) and Bode Diagram (right).
To obtain the desired shape an R
implementation. A zero at ω
integrator minimizes the static error while placing the zero ω
resonance assures a simple -20dB/dec shape of the gain.
In fact, considering the usual value for the output filter, the LC resonance results to be at
frequency lower than the above reported zero.
Compensation network can be simply designed placing ω
frequency ω
of the switching frequency F
DROOP
Z
F
(s)
amplitude and has a typical value of 3V.
PWM
Z
FB
FB
(s)
Reference
G
LOOP
=
T
LC
R
R
4
-- -
5
as desired obtaining (always considering that ω
FB
F
R
) and the zero (ω
⋅
s ( )
------------------ -
∆V
F
COMP
V
C
=
=
F
OSC
IN
–
R
----------------------------------
4
-- -
5
V
VSEN
⋅
OUT
FB
--------------------- -
∆V
is the PWM transfer function where ∆V
V
OSC
⋅
V
IN
PWM
∆V
IN
F
SW
= 1/R
⋅
O SC
Z
---------------
T
R
):
. Neglecting the effect of Z
F
ESR
REMOTE BUFFER
FB
d V
s ( )
F
64k
OUT
⋅
- C
F
⋅
) is fixed by ESR and the Droop resistance.
C
5
-- - ω
4
R
------------------------------------------- -
Figure
O
F
F
⋅
L / N
R
+
64k
64k
is then introduced together with an integrator. This
series network is considered for the Z
O
R
T
DR OOP
+
⋅
R
-------
3
18) is designed in order to obtain a high DC gain to
------------------------------------------------------ -
3
L
C
ESR
O
⋅
FBG
FBR
(
R
⋅
------------------------------------------------------------------------------------------------------------------------------------------ -
s
V
DROOP
2
OUT
⋅
C
O
L
R
1
⋅
O
--- -
3
+
L
+
s C
+
F
F
⋅
s
=ω
ESR
(s), the transfer function has one
⋅
R
F
O
F
----------------- -
3
T
[dB]
LC
in correspondence with the L-C
⋅
K
OSC
(
might be not higher than 1/10th
⋅
R
L
R
)
and imposing the cross-over
DROOP
O
dB
C
+
is the oscillator ramp
F
C
O
ω
=
LC
⋅
//R
ESR
=
------------------- -
G
ω
O
C
LOOP
F
ω
+
R
ESR
+
O
ESR
F
C
(s)
F
⋅
O
(s)
L
-- -
3
⋅
)
R
-------
3
L
+
ω
1
T
Z
L6701
F
(s)
ω