DS1961S-F3 Maxim Integrated Products, DS1961S-F3 Datasheet - Page 23

• Manufacturer Part Number: DS1961S-F3
• Description: IBUTTON EEPROM 1KBit SHA-1 2CAN
• Manufacturer: Maxim Integrated Products
• Series: iButton®r

Specifications of DS1961S-F3

• Rohs Information: IButton RoHS Compliance Plan
• Memory Size: 128B
• Memory Type: EEPROM
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

DS1961S
Refresh Scratchpad [A3h]
Refresh scratchpad loads memory data to the scratchpad and sets the EN_LFS flag, which enables the use
of the load first secret command to re-write the data that was just read from the memory, bypassing the
MAC computation of copy scratchpad.
The command flow chart of refresh scratchpad is very similar to write scratchpad. If the target address is
between 0000h–007Fh, there are two primary differences. 1) The data bytes that the master transmits
following the target address are discarded; instead, the scratchpad is loaded with the unaltered memory
data located at the target address, even if the memory page is in EPROM mode. 2) After the master has
transmitted the eight dummy bytes, the EN_LFS flag is set to 1. The EN_LFS flag is cleared to 0 after
receiving TA1 and TA2 during a write scratchpad, compute next secret, read authenticated page, refresh
scratch, read memory, or by a power-on reset, because these commands can change the target address
and/or the data in the scratchpad.
When applied to addresses 0080h–008Fh, the refresh scratchpad command behaves the same way as
write scratchpad. This protects the secret from being exposed by a subsequent read scratchpad command.
Read Memory [F0h]
The read memory command can be used to read all memory except for the secret. Attempting to read the
secret results in FFh bytes instead of the actual secret. After the master has issued the command code and
specified the target addresses (TA1 and TA2), the DS1961S first clears the EN_LFS flag. If the target
address is valid, the master reads data beginning from the target address and can continue until address
0097h. If the master continues reading, the result is logic 1s. It is important to realize that the target
address registers point to the last byte read. The ending offset/data status byte and the scratchpad are
unaffected.
The hardware of the DS1961S provides a means to accomplish error-free writing to the memory section.
To safeguard reading data in the 1-Wire environment and to simultaneously speed up data transfers, it is
recommended to packetize data into data packets of the size of one memory page each. Such a packet
typically stores a master-calculated 16-bit CRC with each page of data to ensure rapid, error-free data
transfers that eliminate having to read a page multiple times to determine if the received data is correct or
not. (Refer to Application Note 114 for the recommended file structure, which is also referred to as
TMEX Format.)
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