DS1961S-F3 Maxim Integrated Products, DS1961S-F3 Datasheet - Page 29

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DS1961S-F3

Manufacturer Part Number
DS1961S-F3
Description
IBUTTON EEPROM 1KBit SHA-1 2CAN
Manufacturer
Maxim Integrated Products
Series
iButton®r
Datasheet

Specifications of DS1961S-F3

Rohs Information
IButton RoHS Compliance Plan
Memory Size
128B
Memory Type
EEPROM
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
DS1961S
Search ROM [F0h]
When a system is initially brought up, the bus master may not know the number of devices on the 1-Wire
bus or their 64-bit registration numbers. The search ROM command allows the bus master to use a
process of elimination to identify the 64-bit numbers of all slave devices on the bus. The search ROM
process is the repetition of a simple 3-step routine: read a bit, read the complement of the bit, then write
the desired value of that bit. The bus master performs this 3-step routine on each bit of the registration
number. After one complete pass, the bus master knows the 64-bit number of one device. Additional
passes will identify the registration numbers of the remaining devices. Refer to Chapter 5 of The Book of
DS19xx iButton Standards for a detailed discussion of a search ROM, including an actual example.
Skip ROM [CCh]
This command can save time in a single drop bus system by allowing the bus master to access the
memory and SHA functions without providing the 64-bit registration number. If more than one slave is
present on the bus and, for example, a read command is issued following the skip ROM command, data
collision occurs on the bus as multiple slaves transmit simultaneously (open-drain pulldowns produce a
wired-AND result).
Resume Command [A5h]
In a typical application the DS1961S needs to be accessed several times to write a full 32-byte page. In a
multidrop environment this means that the 64-bit registration number of a match ROM command has to
be repeated for every access. To maximize the data throughput in a multidrop environment the resume
command function was implemented. This function checks the status of the RC bit and, if it is set,
directly transfers control to the memory and SHA functions, similar to a skip ROM command. The only
way to set the RC bit is through successfully executing the match ROM, search ROM, or overdrive match
ROM command. Once the RC bit is set, the device can repeatedly be accessed through the resume
command function. Accessing another device on the bus clears the RC bit, preventing two or more
devices from simultaneously responding to the resume command function.
Overdrive Skip ROM [3Ch]
On a single-drop bus this command can save time by allowing the bus master to access the memory and
SHA functions without providing the 64-bit registration number. Unlike the normal skip ROM command
the overdrive skip ROM sets the DS1961S in the overdrive mode (OD = 1). All communication following
this command code has to occur at overdrive speed until a reset pulse of minimum 480µs duration resets
all devices on the bus to regular speed (OD = 0). When issued on a multidrop bus this command sets all
overdrive-supporting devices into overdrive mode. To subsequently address a specific overdrive-
supporting device, a reset pulse at overdrive speed has to be issued followed by a match ROM or search
ROM command sequence. This speeds up the search process. If more than one slave supporting overdrive
is present on the bus and the overdrive skip ROM command is followed by a read command, data
collision occurs on the bus as multiple slaves transmit simultaneously (open-drain pulldowns produce a
wired-AND result).
Overdrive Match ROM [69h]
The overdrive match ROM command, followed by a 64-bit registration number transmitted at overdrive
speed, allows the bus master to address a specific DS1961S on a multidrop bus and to simultaneously set
it in overdrive mode. Only the DS1961S that exactly matches the 64-bit number responds to the
subsequent memory or SHA function command. Slaves already in overdrive mode from a previous
overdrive skip or a successful overdrive match command will remain in overdrive mode. All overdrive-
capable slaves return to regular speed at the next reset pulse of minimum 480µs duration. The overdrive
match ROM command can be used with single or multiple devices on the bus.
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