CY3687 Cypress Semiconductor Corp, CY3687 Datasheet - Page 26

• Manufacturer Part Number: CY3687
• Description: KIT DEV MOBL-USB FX2LP18
• Manufacturer: Cypress Semiconductor Corp
• Series: EZ-USB HX2LP™r

Specifications of CY3687

• Main Purpose: Interface, USB 2.0 Host/Controller
• Utilized Ic / Part: CY7C68053
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Secondary Attributes: -
• Embedded: -
• Primary Attributes: -
• Lead Free Status / Rohs Status: Supplier Unconfirmed

8
Table 11. GPIF Synchronous Signals Parameters with Externally Sourced IFCLK
9.3 Slave FIFO Synchronous Read
Table 12. Slave FIFO Synchronous Read Parameters with Internally Sourced IFCLK
Document # 001-06120 Rev *J
Notes
t
t
t
t
t
t
t
t
t
t
t
t
t
t
16. Dashed lines denote signals with programmable polarity.
17. GPIF asynchronous RDY
IFCLK
SRY
RYH
SGD
DAH
XGD
XCTL
IFCLK
SRD
RDH
OEon
OEoff
XFLG
XFD
18. IFCLK must not exceed 48 MHz.
Parameter
Parameter
Figure 9. Slave FIFO Synchronous Read Timing Diagram
IFCLK period
RDY
Clock to RDY
GPIF data to clock setup time
GPIF data hold time
Clock to GPIF data output propagation delay
Clock to CTL
IFCLK period
SLRD to clock setup time
Clock to SLRD hold time
SLOE turn-on to FIFO data valid
SLOE turn-off to FIFO data hold
Clock to FLAGS output propagation delay
Clock to FIFO data output propagation delay
x
signals have a minimum setup time of 50 ns when using internal 48 MHz IFCLK.
X
to clock setup time
FLAGS
SLOE
SLRD
DATA
IFCLK
X
[18]
X
output propagation delay
Description
Description
t
OEon
N
t
SRD
t
IFCLK
t
RDH
t
XFLG
t
XFD
N+1
[16]
20.83
20.83
18.7
2.15
Min
Min
2.9
3.7
3.2
4.5
0
[17]
t
OEoff
[17]
13.06
Max
Max
10.5
10.5
200
9.5
15
11
CY7C68053
Unit
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
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