SI3232PPT0-EVB Silicon Laboratories Inc, SI3232PPT0-EVB Datasheet - Page 11
![no-image](/images/manufacturer_photos/0/6/609/silicon_laboratories_inc_sml.jpg)
SI3232PPT0-EVB
Manufacturer Part Number
SI3232PPT0-EVB
Description
BOARD EVAL W/SI3200 INTERFACE
Manufacturer
Silicon Laboratories Inc
Series
ProSLIC®r
Datasheet
1.SI3232-FQ.pdf
(128 pages)
Specifications of SI3232PPT0-EVB
Main Purpose
Interface, Analog Front End (AFE)
Utilized Ic / Part
Si3232
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Secondary Attributes
-
Embedded
-
Primary Attributes
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
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Table 6. Monitor ADC Characteristics
(V
Table 7. Si3200 Characteristics
(V
Parameter
Resolution
Differential Nonlinearity
Integral Nonlinearity
Gain Error
Parameter
TIP/RING Pulldown Transistor
Saturation Voltage
TIP/RING Pullup Transistor
Saturation Voltage
Battery Switch Saturation
Impedance
OPEN State TIP/RING Leakage
Current
Internal Blocking Diode Forward
Voltage
Notes:
DD
DD
1. V
2. I
, V
=
DD1
3.13 to 3.47 V, T
OUT
AC
–V
=
= 60 mA
DD4
2.5 V
=
PK
3.13 to 3.47 V, T
, R
A
LOAD
=
0 to 70 °C for K-Grade, –40 to 85 °C for B-Grade)
=
Symbol
600 Ω.
DNL
INL
A
=
Symbol
0 to 70 °C for K-Grade, –40 to 85 °C for B-Grade)
R
V
I
V
LKG
V
SAT
CM
OV
F
Test Condition
Preliminary Rev. 0.96
(V
I
I
LIM
V
LIM
BAT
GND – V
V
GND – V
V
RING
TIP
BAT
= 45 mA, I
= 22 mA, I
– V
Test Condition
I
I
LIM
LIM
– V
– V
– V
BATH
R
RING
BAT
L
= 22 mA
= 45 mA
BAT
TIP
BATL
= 0 Ω
)/I
ABIAS
(Reverse)
(Forward)
(Forward),
ABIAS
OUT
(Reverse)
(Note 2)
1
1
(Note 2)
= 16 mA
= 4 mA
–1.0
Min
—
—
—
—
1
1
Min
±0.75
⎯
⎯
⎯
⎯
⎯
⎯
⎯
±0.6
±0.1
Typ
—
8
Typ
0.8
15
⎯
3
4
3
4
±0.25
+1.5
Max
±1.5
—
—
Si3232
Max
100
⎯
—
⎯
—
⎯
⎯
Unit
LSB
LSB
LSB
LSB
Bits
Unit
µA
W
V
V
V
V
V
11
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