SI3232PPT0-EVB Silicon Laboratories Inc, SI3232PPT0-EVB Datasheet - Page 27
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SI3232PPT0-EVB
Manufacturer Part Number
SI3232PPT0-EVB
Description
BOARD EVAL W/SI3200 INTERFACE
Manufacturer
Silicon Laboratories Inc
Series
ProSLIC®r
Datasheet
1.SI3232-FQ.pdf
(128 pages)
Specifications of SI3232PPT0-EVB
Main Purpose
Interface, Analog Front End (AFE)
Utilized Ic / Part
Si3232
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Secondary Attributes
-
Embedded
-
Primary Attributes
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
The maximum power threshold for each device is
software-programmable and should be set based on the
characteristics of the transistor package, PCB design,
and available airflow. If the peak power exceeds the
programmed threshold for any device, the power alarm
bit is set for that device. Each external bipolar has its
own register bit (PQ1S–PQ6S bits of the IRQVEC3
register) which goes high on a rising edge of the
comparator output and remains high until the user
clears it. Each transistor power alarm bit is also
maskable by setting the PQ1E–PQ6E bits in the
IRQEN3 register.
4.4.5. Si3200 Power Calculation
When using the Si3200, it is also possible to detect the
thermal conditions of the linefeed circuit by calculating
the total power dissipated within the Si3200. This case
is similar to the Transistor Power Equations case, with
the exception that the total power from all transistor
devices is dissipated within the same package
enclosure and the total power result is placed in the
PSUM RAM location. The power calculation is derived
using the following set of equations:
P
P
P
P
P
P
PSUM = total dissipated power = P
P
Note: The Si3200 THERM pin must be connected to the
4.4.6. Power Filter and Alarms
The power calculated during each A/D sample period
must be filtered before being compared to a user-
programmable maximum-power threshold. A simple
digital low-pass filter is used to approximate the
transient thermal behavior of the package, with the
output of the filter representing the effective peak power
within the package or, equivalently, the peak junction
temperature.
For Q1, Q2, Q3, Q4 in SOT23 and Q5, and Q6 in
SOT223 packages, the settings for thermal low-pass
filter poles and power threshold settings are (for an
ambient temperature of 70 °C) calculated as follows:
Suppose that the thermal time constant of the package
is τ
PLPF12, PLPF34, and PLPF56 are given by rounding
to the next integer the value given by the following
equation:
Q1
Q2
Q3
Q4
Q5
Q6
Q4
thermal
≅ (|V
≅ (|V
≅ (|V
≅ (|V
≅ (|V
≅ (|V
+ P
THERM a/b pin of the Si3232 in order for the Si3200
power calculation to work correctly.
Q5
TIP
RING
BAT
BAT
BAT
BAT
. The decimal values of RAM locations
+ P
| + 0.75 V) x I
|+ 0.75 V) x I
| + 0.75 V) x I
| – |V
| – |V
| + 0.75 V) x I
Q6
RING
TIP
|) x I
|) x I
Q6
Q3
Q1
Q4
Q5
Q2
Q1
+ P
Q2
Preliminary Rev. 0.96
+ P
Q3
+
where 4096 is the maximum value of the 12-bit plus
sign RAM locations, PLPF12, PLPF34, and PLPF56,
and 800 is the power calculation clock rate in Hz. The
equation is an excellent approximation of the exact
equation for τ
above equations in mind, example values of the RAM
locations, PTH12, PTH34, PTH56, PLPF12, PLPF34,
and PLPF56 follow:
PTH12 = power threshold for Q1, Q2 = 0.3 W (0x25A)
PTH34 = power
(0x1BSE)
PTH56 = power threshold for Q5, Q6 = 1 W (0x7D8)
PLPF12 = Q1/Q2 Thermal LPF pole = 0x0012 (for SOT-
89 package)
PLPF34 = Q3/Q4 Thermal LPF pole = 0x008C (for
SOT-23 package)
PLPF56 = Q5/Q6 thermal LPF pole = 0x000E (for SOT-
223 package)
When Si3200 is used, the thermal filtering needs to be
performed on the total power reflected in the PSUM
RAM location. When the filter output exceeds the total
power threshold, an interrupt is issued. The PTH12
RAM location is used to preset the total power threshold
for the Si3200, and the PLPF12 RAM location is used to
preset the thermal low-pass filter pole.
When the THERM pin is connected from the Si3232 to
the Si3200 (indicating the presence of an Si3200), the
resolution of the PTH12 and PSUM RAM locations is
modified
Additionally, the τ
accommodate the Si3200. τ
typically 0.7 s assuming the exposed pad is connected
to the recommended ground plane as stated in Table 1.
τ
sufficient thermal conduction. See “AN58: Si3220/
Si3225 Programmer’s Guide” for details.
Example calculations for PTH12 and PLPF12 in Si3200
mode are shown below:
PTH12 = Si3200 power threshold = 1 W (0x3B0)
PLPF12 = Si3200 thermal LPF pole = 2 (0x0010)
4.4.7. Automatic State Change Based on Power
If any of the following situations occurs, the device
automatically transitions to the OPEN state:
THERMAL
Any of the transistor power alarm thresholds is
exceeded (in the case of the discrete transistor
circuit).
Alarm
PLPFxx (decimal value)
decreases if the PCB layout does not provide
from
thermal
THERMAL
threshold
498 µW/LSB
= 1.25 ms … 5.12 s. With the
value must be modified to
THERMAL
=
for
------------------------------------
800
to
4096
×
Q3,
τ
thermal
for the Si3200 is
1059.6 µW/LSB.
Si3232
Q4 = 0.22 W
×
2
3
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