SI3232PPT0-EVB Silicon Laboratories Inc, SI3232PPT0-EVB Datasheet - Page 4
![no-image](/images/manufacturer_photos/0/6/609/silicon_laboratories_inc_sml.jpg)
SI3232PPT0-EVB
Manufacturer Part Number
SI3232PPT0-EVB
Description
BOARD EVAL W/SI3200 INTERFACE
Manufacturer
Silicon Laboratories Inc
Series
ProSLIC®r
Datasheet
1.SI3232-FQ.pdf
(128 pages)
Specifications of SI3232PPT0-EVB
Main Purpose
Interface, Analog Front End (AFE)
Utilized Ic / Part
Si3232
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Secondary Attributes
-
Embedded
-
Primary Attributes
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
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Si3232
1. Electrical Specifications
Table 1. Absolute Maximum Ratings and Thermal Information
4
Parameter
Supply Voltage, Si3200 and Si3232
High Battery Supply Voltage
Low Battery Supply Voltage, Si3200
TIP or RING Voltage, Si3200
TIP, RING Current, Si3200
STIPAC, STIPDC, SRINGAC,
SRINGDC Current, Si3232
Input Current, Digital Input Pins
Digital Input Voltage
Operating Temperature Range
Storage Temperature Range
Si3232 Thermal Resistance, Typical
(TQFP-64 ePad)
Si3200 Thermal Resistance, Typical
(SOIC-16 ePad)
Continuous Power Dissipation,
Si3200
Continuous Power Dissipation,
Si3232
Notes:
1. Permanent device damage may occur if the above Absolute Maximum Ratings are exceeded. Functional operation
2. The dv/dt of the voltage applied to the V
3. The thermal resistance of an exposed pad package is assured when the recommended PCB layout guidelines are
4. On-chip thermal limiting circuitry will shut down the circuit at a junction temperature of approximately 150 °C. For
should be restricted to the conditions as specified in the operational sections of this data sheet. Exposure to absolute
maximum rating conditions for extended periods may affect device reliability.
followed correctly. The specified performance requires that the exposed pad be soldered to an exposed copper surface
of equal size and that multiple vias are added to enable heat transfer between the top-side copper surface and a large
internal copper ground plane. Refer to “AN55: Dual ProSLIC™ User Guide” or to the Si3232 evaluation board data
sheet for specific layout examples.
optimal reliability, operation above 140 °C junction temperature should be avoided.
4
2
2
3
3
V
DD
V
BAT
V
I
Symbol
TIP
, V
BAT
TIP
V
T
, V
V
θ
θ
, I
Preliminary Rev. 0.96
DD1
BATH
, V
P
P
I
T
STG
, V
IND
IN
JA
JA
A
D
D
BATH
RING
RING
BATL
–V
DD4
, and V
T
BATL
T
A
A
Test Condition
= 85 °C, TQFP-64
= 85 °C, SOIC-16
Pulse < 10 µs
Pulse < 4 µs
pins must be limited to 10 V/µs.
Continuous
Continuous
Continuous
Continuous
10 ms
1
–0.3 to (
0.4 to –104
0.4 to –109
–0.5 to 6.0
V
V
–40 to 100
–40 to 150
BATH
BATH
V
Value
–104
±100
±20
±10
BATH
1.6
25
55
V
1
DD
–15
–35
+ 0.3)
°C/W
°C/W
Unit
mA
mA
mA
°C
°C
W
W
V
V
V
V
V
V
V
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