SI5324-EVB Silicon Laboratories Inc, SI5324-EVB Datasheet - Page 49

• Manufacturer Part Number: SI5324-EVB
• Description: BOARD EVALUATION SI5324
• Manufacturer: Silicon Laboratories Inc

Specifications of SI5324-EVB

• Main Purpose: Timing, Clock Multiplier
• Embedded: No
• Utilized Ic / Part: SI5324
• Primary Attributes: 2 Inputs, 2 Outputs
• Secondary Attributes: CML, CMOS, LVDS, LVPECL
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

Reset value = 0000 0000
Reset value = 0000 1111
Register 137.
Register 138.
Name
Type
Name
Type
7:1
7:2
Bit
Bit
Bit
0
Bit
1
0
LOS2_EN [1:0]
LOS1_EN [1:0]
FASTLOCK
Reserved
Reserved
D7
D7
Name
Name
D6
D6
Reserved.
Enable CKIN2 LOS Monitoring on the Specified Input (2 of 2).
Note: LOS2_EN is split between two registers.
00: Disable LOS monitoring.
01: Reserved.
10: Enable LOSA monitoring.
11: Enable LOS monitoring.
LOSA is a slower and less sensitive version of LOS. See the Family Reference Manual
for details.
Enable CKIN1 LOS Monitoring on the Specified Input (1 of 2).
Note: LOS1_EN is split between two registers.
00: Disable LOS monitoring.
01: Reserved.
10: Enable LOSA monitoring.
11: Enable LOS monitoring.
LOSA is a slower and less sensitive version of LOS. See the Family Reference Manual
for details.
Do not modify.
This bit must be set to 1 to enable FASTLOCK. This improves initial lock time by
dynamically changing the loop bandwidth.
D5
Reserved
D5
R
D4
Preliminary Rev. 0.3
Reserved
D4
R
D3
Function
D2
Function
D3
LOS2_EN [1:1]
D2
R/W
D1
D1
LOS1_EN [1:1]
Si5324
R/W
D0
FASTLOCK
R/W
D0
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