CDB44800 Cirrus Logic Inc, CDB44800 Datasheet - Page 48
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CDB44800
Manufacturer Part Number
CDB44800
Description
BOARD EVAL FOR CS44800 PWM CTRL
Manufacturer
Cirrus Logic Inc
Series
Popguard®r
Specifications of CDB44800
Amplifier Type
Class D
Output Type
8-Channel
Voltage - Supply
20 V ~ 50 V
Operating Temperature
-10°C ~ 70°C
Board Type
Fully Populated
Utilized Ic / Part
CS44800
Description/function
Audio DSPs
Operating Supply Voltage
5 V
Product
Audio Modules
For Use With/related Products
CS44800
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Max Output Power X Channels @ Load
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
598-1532
CDB-44800
CDB-44800
Addr
21h
22h
23h
24h
25h
26h
27h
28h
29h
2Ah
2Bh
2Ch
2Dh
2Eh
2Fh
30h
Chnl A3 Comp.
Filter - Fine Adj
page 63
Chnl B3 Comp.
Filter - Coarse Adj
page 62
Chnl B3 Comp.
Filter - Fine Adj
page 63
Chnl A4 Comp.
Filter - Coarse Adj
page 62
Chnl A4 Comp.
Filter - Fine Adj
page 63
Chnl B4 Comp.
Filter - Coarse Adj
page 62
Chnl B4 Comp.
Filter - Fine Adj
page 63
Interrupt Mode
Control
page 63
Interrupt Mask
page 64
Interrupt Status
page 64
Chnl Over Flow Sta-
tus
page 66
GPIO Pin I/O
page 66
GPIO Pin
ity/Type
ppage 66
GPIO Pin Level/Edge
trigger
page 67
GPIO Pin Status
page 67
GPIO Interrupt Mask
page 68
Function
Polar-
default
default
default
default
default
default
default
default
default
default
default
default
default
default
default
default
M_SRC_UNLOCK
SRC_UNLOCK
CHB4_OVFL
RESERVED
RESERVED
RESERVED
RESERVED
RESERVED
RESERVED
RESERVED
RESERVED
RESERVED
RESERVED
RESERVED
RESERVED
INT1
7
0
0
0
0
0
0
0
0
0
0
0
0
0
0
X
0
GPIO6_STATUS
M_SRC_LOCK
CHA4_OVFL
RESERVED
RESERVED
RESERVED
RESERVED
RESERVED
RESERVED
RESERVED
SRC_LOCK
RESERVED
GPIO6_P/T
GPIO6_I/O
GPIO6_L/E
INT0
6
0
0
0
0
0
0
0
0
0
0
0
0
1
0
X
0
M_RMPUP_DONE
GPIO5_STATUS
RMPUP_DONE
CHB3_CORS5
CHA4_CORS5
CHB4_CORS5
CHA3_FINE5
CHB3_FINE5
CHA4_FINE5
CHB4_FINE5
CHB3_OVFL
RESERVED
RESERVED
GPIO5_P/T
GPIO5_L/E
GPIO5_I/O
X
5
0
0
0
0
0
0
0
0
0
0
0
0
1
0
0
M_RMPDN_DONE
GPIO4_STATUS
RMPDN_DONE
CHB3_CORS4
CHA4_CORS4
CHB4_CORS4
CHA3_FINE4
CHB3_FINE4
CHA4_FINE4
CHB4_FINE4
CHA3_OVFL
RESERVED
RESERVED
GPIO4_P/T
GPIO4_I/O
GPIO4_L/E
4
0
0
0
0
0
0
0
0
0
0
0
0
1
0
X
0
M_MUTE_DONE
GPIO3_STATUS
CHB3_CORS3
CHA4_CORS3
CHB4_CORS3
MUTE_DONE
CHA3_FINE3
CHB3_FINE3
CHA4_FINE3
CHB4_FINE3
CHB2_OVFL
RESERVED
GPIO3_P/T
GPIO3_L/E
GPIO3_I/O
M_GPIO3
X
3
0
0
0
0
0
0
0
0
0
0
0
0
1
0
0
GPIO2_STATUS
CHB3_CORS2
CHA4_CORS2
CHB4_CORS2
CHA3_FINE2
CHB3_FINE2
CHA4_FINE2
CHB4_FINE2
M_OVFL_INT
CHA2_OVFL
RESERVED
GPIO2_P/T
GPIO2_I/O
GPIO2_L/E
OVFL_INT
M_GPIO2
2
0
0
0
0
0
0
0
0
0
0
0
0
1
0
X
0
GPIO1_STATUS
CHB3_CORS1
CHA4_CORS1
CHB4_CORS1
CHA3_FINE1
CHB3_FINE1
CHA4_FINE1
CHB4_FINE1
CHB1_OVFL
RESERVED
RESERVED
GPIO1_P/T
GPIO1_I/O
GPIO1_L/E
GPIO_INT
M_GPIO1
1
0
0
0
0
0
0
0
0
0
0
0
0
1
0
X
0
GPIO0_STATUS
CHB3_CORS0
CHA4_CORS0
CHB4_CORS0
CHA3_FINE0
CHB3_FINE0
CHA4_FINE0
CHB4_FINE0
CHA1_OVFL
RESERVED
RESERVED
GPIO0_P/T
GPIO0_L/E
GPIO0_I/O
OVFL_L/E
M_GPIO0
X
0
0
0
0
0
0
0
0
0
0
0
0
0
1
0
0