ATTINY20-EK1 Atmel, ATTINY20-EK1 Datasheet - Page 149
ATTINY20-EK1
Manufacturer Part Number
ATTINY20-EK1
Description
KIT EVAL TOUCH ATTINY20
Manufacturer
Atmel
Datasheet
1.ATTINY20-EK1.pdf
(224 pages)
Specifications of ATTINY20-EK1
Sensor Type
*
Sensing Range
*
Interface
*
Sensitivity
*
Voltage - Supply
*
Embedded
*
Utilized Ic / Part
*
Silicon Manufacturer
Atmel
Core Architecture
AVR
Core Sub-architecture
TinyAVR
Kit Contents
Board
Svhc
No SVHC (15-Dec-2010)
Mcu Supported Families
ATtiny20
Tool / Board Applications
Microcontroller
Rohs Compliant
Yes
Tool Type
Development Kit
Cpu Core
AVR 8
Data Bus Width
8 bit
Processor To Be Evaluated
ATtiny20
Interface Type
Touch
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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ATtiny20
If TWASIE in TWSCRA is set, a STOP condition on the bus will also set TWASIF. STOP condi-
tion will set the flag only if system clock is faster than the minimum bus free time between STOP
and START.
Writing a one to this bit will clear the flag. This flag is also automatically cleared when writing a
valid command to the TWCMDn bits in TWSCRB.
• Bit 5 – TWCH: TWI Clock Hold
This bit is set when the slave is holding the SCL line low.
This bit is read-only, and set when TWDIF or TWASIF is set. The bit can be cleared indirectly by
clearing the interrupt flags and releasing the SCL line.
• Bit 4 – TWRA: TWI Receive Acknowledge
This bit contains the most recently received acknowledge bit from the master.
This bit is read-only. When zero, the most recent acknowledge bit from the maser was ACK and,
when one, the most recent acknowledge bit was NACK.
• Bit 3 – TWC: TWI Collision
This bit is set when the slave was not able to transfer a high data bit or a NACK bit. When a col-
lision is detected, the slave will commence its normal operation, and disable data and
acknowledge output. No low values are shifted out onto the SDA line.
This bit is cleared by writing a one to it. The bit is also cleared automatically when a START or
Repeated START condition is detected.
149
8235B–AVR–04/11
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