ATTINY20-EK1 Atmel, ATTINY20-EK1 Datasheet - Page 22

• Manufacturer Part Number: ATTINY20-EK1
• Description: KIT EVAL TOUCH ATTINY20
• Manufacturer: Atmel

Specifications of ATTINY20-EK1

• Sensor Type: *
• Sensing Range: *
• Interface: *
• Sensitivity: *
• Voltage - Supply: *
• Embedded: *
• Utilized Ic / Part: *
• Silicon Manufacturer: Atmel
• Core Architecture: AVR
• Core Sub-architecture: TinyAVR
• Kit Contents: Board
• Svhc: No SVHC (15-Dec-2010)
• Mcu Supported Families: ATtiny20
• Tool / Board Applications: Microcontroller
• Rohs Compliant: Yes
• Tool Type: Development Kit
• Cpu Core: AVR 8
• Data Bus Width: 8 bit
• Processor To Be Evaluated: ATtiny20
• Interface Type: Touch
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

6.5
6.5.1
6.5.2
22
Register Description
ATtiny20
CLKMSR – Clock Main Settings Register
CLKPSR – Clock Prescale Register
• Bits 7:2 – Res: Reserved Bits
These bits are reserved and will always read as zero.
• Bits 1:0 – CLKMS[1:0]: Clock Main Select Bits
These bits select the main clock source of the system. The bits can be written at run-time to
switch the source of the main clock. The clock system ensures glitch free switching of the main
clock source.
The main clock alternatives are shown in
Table 6-3.
To avoid unintentional switching of main clock source, a protected change sequence must be
followed to change the CLKMS bits, as follows:
• Bits 7:4 – Res: Reserved Bits
These bits are reserved and will always read as zero.
• Bits 3:0 – CLKPS[3:0]: Clock Prescaler Select Bits 3 - 0
These bits define the division factor between the selected clock source and the internal system
clock. These bits can be written at run-time to vary the clock frequency and suit the application
Bit
0x37
Read/Write
Initial Value
Bit
0x36
Read/Write
Initial Value
1. Write the signature for change enable of protected I/O register to register CCP
2. Within four instruction cycles, write the CLKMS bits with the desired value
CLKM1
0
0
1
1
Selection of Main Clock
R
R
7
–
0
7
–
0
CLKM0
0
1
0
1
R
R
6
–
0
6
–
0
R
R
5
–
0
5
–
0
Main Clock Source
Calibrated Internal 8 MHz Oscillator
Internal 128 kHz Oscillator (WDT Oscillator)
External clock
Reserved
R
R
4
–
0
4
–
0
Table
CLKPS3
6-3.
R/W
3
–
R
0
3
0
CLKPS2
R
2
–
0
R/W
2
0
CLKMS1
CLKPS1
R/W
1
0
R/W
1
1
CLKMS0
R/W
CLKPS0
0
0
R/W
0
1
CLKMSR
8235B–AVR–04/11
CLKPSR