ATTINY20-EK1 Atmel, ATTINY20-EK1 Datasheet - Page 16

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ATTINY20-EK1

Manufacturer Part Number
ATTINY20-EK1
Description
KIT EVAL TOUCH ATTINY20
Manufacturer
Atmel
Datasheet

Specifications of ATTINY20-EK1

Sensor Type
*
Sensing Range
*
Interface
*
Sensitivity
*
Voltage - Supply
*
Embedded
*
Utilized Ic / Part
*
Silicon Manufacturer
Atmel
Core Architecture
AVR
Core Sub-architecture
TinyAVR
Kit Contents
Board
Svhc
No SVHC (15-Dec-2010)
Mcu Supported Families
ATtiny20
Tool / Board Applications
Microcontroller
Rohs Compliant
Yes
Tool Type
Development Kit
Cpu Core
AVR 8
Data Bus Width
8 bit
Processor To Be Evaluated
ATtiny20
Interface Type
Touch
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
5.2.1
16
ATtiny20
Data Memory Access Times
Figure 5-1.
This section describes the general access timing concepts for internal memory access. The
internal data SRAM access is performed in two clk
Figure 5-2.
Address
clk
Data Memory Map (Byte Addressing)
On-chip Data SRAM Access Cycles
Data
Data
WR
CPU
RD
FLASH PROGRAM MEMORY
CONFIGURATION BITS
SRAM DATA MEMORY
CALIBRATION BITS
NVM LOCK BITS
DEVICE ID BITS
Compute Address
I/O SPACE
(reserved)
(reserved)
(reserved)
(reserved)
(reserved)
(reserved)
T1
Memory Access Instruction
Address valid
CPU
T2
0x0000 ... 0x003F
0x0040 ... 0x00BF
0x00C0 ... 0x3EFF
0x3F00 ... 0x3F01
0x3F02 ... 0x3F3F
0x3F40 ... 0x3F41
0x3F42 ... 0x3F7F
0x3F80 ... 0x3F81
0x3F82 ... 0x3FBF
0x3FC0 ... 0x3FC3
0x3FC4 ... 0x3FFF
0x4000 ... 0x47FF
0x4800 ... 0xFFFF
cycles as described in
Next Instruction
T3
Figure
8235B–AVR–04/11
5-2.

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