C8051F320DK Silicon Laboratories Inc, C8051F320DK Datasheet - Page 187

• Manufacturer Part Number: C8051F320DK
• Description: DEV KIT FOR C8051F320/F321
• Manufacturer: Silicon Laboratories Inc
• Type: MCUr

Specifications of C8051F320DK

• Contents: Evaluation Board, Power Supply, USB Cables, Adapter and Documentation
• Processor To Be Evaluated: C8051F320/F321
• Interface Type: USB
• Silicon Manufacturer: Silicon Labs
• Core Architecture: 8051
• Silicon Core Number: C8051F320
• Silicon Family Name: C8051F32x
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• For Use With/related Products: Silicon Laboratories C8051F320, C8051F321
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 336-1260

17. UART0
UART0 is an asynchronous, full duplex serial port offering modes 1 and 3 of the standard 8051 UART.
Enhanced baud rate support allows a wide range of clock sources to generate standard baud rates (details
in Section “17.1. Enhanced Baud Rate Generation” on page 188). Received data buffering allows UART0
to start reception of a second incoming data byte before software has finished reading the previous data
byte.
UART0 has two associated SFRs: Serial Control Register 0 (SCON0) and Serial Data Buffer 0 (SBUF0).
The single SBUF0 location provides access to both transmit and receive registers. Writes to SBUF0
always access the Transmit register. Reads of SBUF0 always access the buffered Receive register;
it is not possible to read data from the Transmit register.
With UART0 interrupts enabled, an interrupt is generated each time a transmit is completed (TI0 is set in
SCON0), or a data byte has been received (RI0 is set in SCON0). The UART0 interrupt flags are not
cleared by hardware when the CPU vectors to the interrupt service routine. They must be cleared manually
by software, allowing software to determine the cause of the UART0 interrupt (transmit complete or receive
complete).
Rate Generator
UART Baud
Write to
SBUF
Figure 17.1. UART0 Block Diagram
Rx Clock
Tx Clock
Stop Bit
Start
Start
SBUF
Read
SCON
D
TB8
SET
CLR
Shift
Input Shift Register
Q
Shift
SFR Bus
(RX Latch)
Rx Control
(9 bits)
Tx Control
SBUF
0x1FF
SFR Bus
Zero Detector
(TX Shift)
SBUF
Rev. 1.4
RB8
Load SBUF
Rx IRQ
Tx IRQ
RI
TI
SBUF
Load
Send
Data
Interrupt
Serial
Port
TX
RX
Crossbar
Crossbar
C8051F320/1
Port I/O
187